diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2021-08-04 23:47:50 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-09 17:49:23 +0000 |
commit | 711023590278eb1cfdb050b5e68d14827c63527a (patch) | |
tree | 312efec316b5b925757e4baf8e1baff63ee04f27 /src | |
parent | b4fe8c5948bebba435cce76c0dfa9a7d8ed348b4 (diff) |
soc/amd/common/block/acpi/gpio: add warning for remote GPIO usage
Right now the ACPI code doesn't support accessing the remote GPIO block
yet, so don't generate invalid remote GPIO access functions and warn
about those being unsupported.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id364a59c9650bf4e3633b494b01ab23c0bbc50b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/common/block/acpi/gpio.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpi/gpio.c b/src/soc/amd/common/block/acpi/gpio.c index 15ee292e7d..b5167b8743 100644 --- a/src/soc/amd/common/block/acpi/gpio.c +++ b/src/soc/amd/common/block/acpi/gpio.c @@ -11,6 +11,12 @@ static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num) " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); return -1; } + if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER && + gpio_num >= SOC_GPIO_TOTAL_PINS) { + printk(BIOS_WARNING, "Warning: Pin %d is a remote GPIO which isn't supported" + " yet.\n", gpio_num); + return -1; + } /* op (gpio_num) */ acpigen_emit_namestring(op); acpigen_write_integer(gpio_num); @@ -24,6 +30,12 @@ static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num) " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); return -1; } + if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER && + gpio_num >= SOC_GPIO_TOTAL_PINS) { + printk(BIOS_WARNING, "Warning: Pin %d is a remote GPIO which isn't supported" + " yet.\n", gpio_num); + return -1; + } /* Store (op (gpio_num), Local0) */ acpigen_write_store(); acpigen_soc_gpio_op(op, gpio_num); |