diff options
| author | Dinesh Gehlot <digehlot@google.com> | 2024-08-10 12:47:33 +0530 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2024-08-11 02:40:28 +0000 |
| commit | 70e62188f4caa7ffa5a765c43a7faecaa5523d5a (patch) | |
| tree | c4b0acc50fa88145704efdde50567d6a8c2f3e9e /src | |
| parent | 76021a92054a71d249f28e5d1788c3afe51ad7ae (diff) | |
mb/google/brya/variants: Enable pch_hda_sdi_enable for trulo baseboard
This patch enables pch_hda_sdi_enable for the trulo baseboard and
removes SDI lanes update from its variants.
BUG=b:350931954
TEST=Boot verified on google/craask and google/tivviks
Change-Id: I2e0f43b8fffb5e583089769d2c7446b476ce5d5d
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83859
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
3 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb index a93ba4ee75..5ce75c9684 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb @@ -40,6 +40,9 @@ chip soc/intel/alderlake register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 2 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3 + # HD Audio + register "pch_hda_sdi_enable[0]" = "true" + register "pch_hda_sdi_enable[1]" = "true" device domain 0 on device ref igpu on end diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb index 89d4d2f4b9..ffc3a56660 100644 --- a/src/mainboard/google/brya/variants/orisa/overridetree.cb +++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb @@ -100,8 +100,6 @@ chip soc/intel/alderlake # HD Audio register "pch_hda_dsp_enable" = "1" - register "pch_hda_sdi_enable[0]" = "1" - register "pch_hda_sdi_enable[1]" = "1" register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb index 510053f91e..a5b346c42f 100644 --- a/src/mainboard/google/brya/variants/trulo/overridetree.cb +++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb @@ -100,8 +100,6 @@ chip soc/intel/alderlake # HD Audio register "pch_hda_dsp_enable" = "1" - register "pch_hda_sdi_enable[0]" = "1" - register "pch_hda_sdi_enable[1]" = "1" register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" |