summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorSean Rhodes <sean@starlabs.systems>2023-02-06 09:23:47 +0000
committerLean Sheng Tan <sheng.tan@9elements.com>2023-02-20 10:14:49 +0000
commit6bfca1b689e48be4f72e8fa401f3558d845fc282 (patch)
tree6b1ee5296f341e08a0f815fd4f4f9fe3b027b132 /src
parentdbb97c3243e55a0fd00e692d150c9d38d09b57af (diff)
soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT
Select NO_S0IX_SUPPORT for `starlabs/starbook` and `atlas/prodrive` so their configurations are unchanged. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I718952165daa6471f11e8025e745fe7c249d3b46 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72800 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/prodrive/atlas/Kconfig2
-rw-r--r--src/mainboard/starlabs/starbook/Kconfig3
-rw-r--r--src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb1
-rw-r--r--src/soc/intel/alderlake/fsp_params.c2
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c3
5 files changed, 5 insertions, 6 deletions
diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig
index eda23cb519..e36f195b49 100644
--- a/src/mainboard/prodrive/atlas/Kconfig
+++ b/src/mainboard/prodrive/atlas/Kconfig
@@ -9,9 +9,9 @@ config BOARD_PRODRIVE_ATLAS_BASEBOARD
select MAINBOARD_HAS_TPM2
select MAINBOARD_USES_IFD_EC_REGION
select MEMORY_MAPPED_TPM
+ select NO_S0IX_SUPPORT
select PCIEXP_SUPPORT_RESIZABLE_BARS
select SOC_INTEL_ALDERLAKE_PCH_P
- select SOC_INTEL_ALDERLAKE_S3
if BOARD_PRODRIVE_ATLAS_BASEBOARD
diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig
index 5b91496cf4..807b6a945a 100644
--- a/src/mainboard/starlabs/starbook/Kconfig
+++ b/src/mainboard/starlabs/starbook/Kconfig
@@ -10,6 +10,7 @@ config BOARD_STARLABS_STARBOOK_SERIES
select INTEL_GMA_HAVE_VBT
select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_TPM2
+ select NO_S0IX_SUPPORT
select NO_UART_ON_SUPERIO
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SYSTEM_TYPE_LAPTOP
@@ -50,7 +51,6 @@ config BOARD_STARLABS_STARBOOK_TGL
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SOC_INTEL_TIGERLAKE
- select SOC_INTEL_TIGERLAKE_S3
select SPI_FLASH_WINBOND
select TPM_MEASURED_BOOT
@@ -65,7 +65,6 @@ config BOARD_STARLABS_STARBOOK_ADL
select MEMORY_MAPPED_TPM
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_P
- select SOC_INTEL_ALDERLAKE_S3
select SPI_FLASH_WINBOND
select TPM_MEASURED_BOOT
select PCIEXP_SUPPORT_RESIZABLE_BARS
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
index cd8c48071a..c3a3f45546 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
@@ -19,7 +19,6 @@ chip soc/intel/tigerlake
register "CnviBtAudioOffload" = "1"
register "enable_c6dram" = "1"
register "SaGv" = "SaGv_Enabled"
- register "TcssD3ColdDisable" = "1"
# FSP Silicon
# Serial I/O
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 42475c4561..aa8de99391 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -648,7 +648,7 @@ static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg,
/* D3Hot and D3Cold for TCSS */
s_cfg->D3HotEnable = !config->tcss_d3_hot_disable;
- s_cfg->D3ColdEnable = !CONFIG(SOC_INTEL_ALDERLAKE_S3) && !config->tcss_d3_cold_disable;
+ s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT) && !config->tcss_d3_cold_disable;
s_cfg->UsbTcPortEn = 0;
for (int i = 0; i < MAX_TYPE_C_PORTS; i++) {
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index b823f50301..a10db87202 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -323,11 +323,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* D3Hot and D3Cold for TCSS */
params->D3HotEnable = !config->TcssD3HotDisable;
+
cpu_id = cpu_get_cpuid();
if (cpu_id == CPUID_TIGERLAKE_A0)
params->D3ColdEnable = 0;
else
- params->D3ColdEnable = !config->TcssD3ColdDisable;
+ params->D3ColdEnable = CONFIG(D3COLD_SUPPORT);
params->UsbTcPortEn = config->UsbTcPortEn;
params->TcssAuxOri = config->TcssAuxOri;