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authorSubrata Banik <subratabanik@google.com>2023-06-12 18:07:33 +0530
committerSubrata Banik <subratabanik@google.com>2023-08-31 08:16:51 +0000
commit6aca25c887ba9e7cce92e18ab77fc49c352ad12a (patch)
tree24aa1fe74673963ab7022fab81c04f3a4f7ee79a /src
parent1b25422215279191da7f71840da7214fbcb22b9c (diff)
mb/google/rex: Enable Fast V-Mode for MTL-U 15W
This patch sets the Fast V-Mode (FVM) configuration parameter as suggested in Intel doc 640982. As per the doc, Intel MTL-U 15W CPU supports FVM on IA and SA. Fast V-Mode (FVM): Intel Meteor Lake introduces the ability to manage the peak power events it calls "reactive peak power management". The Fast V-Mode is one such technique to perform the reactive peak power management. It relies on the detector integrated inside the processor which senses when the processor load current exceeds a present threshold by monitoring the processor power domain IMVP (Intel Mobile Voltage Positioning) VR sense point. The baseline ITRIP for IA is 66A and 21A for SA. BUG=b:286809233 TEST=Able to build and boot google/rex without seeing any performance regression. Change-Id: Ia7157bddf2e9586e4a91cc55e48693561072cd05 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75763 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index b21c011190..ec57ee7f46 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -73,6 +73,17 @@ chip soc/intel/meteorlake
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_codec_enable" = "1"
+ # As per doc 640982, Intel MTL-U 15W CPU supports FVM on IA and SA
+ # The ICC Limit is represented in 1/4 A increments, i.e., a value of 400 = 100A
+ # For IA VR configuration
+ register "enable_fast_vmode[VR_DOMAIN_IA]" = "1"
+ register "cep_enable[VR_DOMAIN_IA]" = "1"
+ register "fast_vmode_i_trip[VR_DOMAIN_IA]" = "264" # 66A
+ # For SA VR configuration
+ register "enable_fast_vmode[VR_DOMAIN_SA]" = "1"
+ register "cep_enable[VR_DOMAIN_SA]" = "1"
+ register "fast_vmode_i_trip[VR_DOMAIN_SA]" = "84" # 21A
+
device domain 0 on
device ref igpu on end
device ref dtt on end