summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorPeichao Wang <peichao.wang@bitland.corp-partner.google.com>2020-01-16 11:24:26 +0800
committerMartin Roth <martinroth@google.com>2020-01-19 23:54:05 +0000
commit63fd650e2e28984100f3ceb6d9f546fad08171b6 (patch)
treee6b2bdd17006e1507f0afee257365ed24ae5c096 /src
parenta988091d395ac59639329161a0d500995886e192 (diff)
mb/google/kahlee/treeya: Update STAPM parameters for Treeya
Change stapm percentage to 80 and time to 2000 seconds make DUT meets Lenovo spec and pass CTS respectively. BUG=b:147333429 TEST=build firmware and install it to DUT and run CTS relevant test, check temperature whether meets spec. Signed-off-by: Peichao Wang <peichao.wang@bitland.corp-partner.google.com> Change-Id: I6a2f059fbd5c89f897cfb46d1f7a82b0923edb17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38443 Reviewed-by: Daniel Kurtz <djkurtz@google.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/kahlee/variants/treeya/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb
index 019dcf65ed..6c953b1af4 100644
--- a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb
@@ -20,8 +20,8 @@ chip soc/amd/stoneyridge
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "16 * MiB"
- register "stapm_percent" = "68"
- register "stapm_time_ms" = "900000"
+ register "stapm_percent" = "80"
+ register "stapm_time_ms" = "2000000"
register "stapm_power_mw" = "7800"
register "lvds_poseq_varybl_to_blon" = "0x5"
register "lvds_poseq_blon_to_varybl" = "0x5"