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authorFelix Held <felix-coreboot@felixheld.de>2022-02-03 15:31:55 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-04 15:23:00 +0000
commit6151ff3eae6503e1b14fd0898b689f295ddd48f8 (patch)
treec298f48414fe2e19eacb1db3dad6cf0333c9fb29 /src
parent3bdbdb77a2ab8904487266b26a33b18c7d85e28b (diff)
drivers/i2c/designware/dw_i2c: improve CONTROL_SPEED_FS definition
The speed control bits of the Designware I2C controller are bits 1 and 2 in the control register, so the values should be written as number shifted by the number of the first bit. The resulting constant is identical. TEST=Timeless build for amd/chausie results in identical binary Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id0881dfcd7703ab6a70a9b1a355d5a93771aebc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/i2c/designware/dw_i2c.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c
index 2a7c6fcc33..2cc236e81b 100644
--- a/src/drivers/i2c/designware/dw_i2c.c
+++ b/src/drivers/i2c/designware/dw_i2c.c
@@ -43,7 +43,7 @@ struct freq {
enum {
CONTROL_MASTER_MODE = (1 << 0),
CONTROL_SPEED_SS = (1 << 1),
- CONTROL_SPEED_FS = (1 << 2),
+ CONTROL_SPEED_FS = (2 << 1),
CONTROL_SPEED_HS = (3 << 1),
CONTROL_SPEED_MASK = (3 << 1),
CONTROL_10BIT_SLAVE = (1 << 3),