diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-23 16:02:28 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-11 11:32:20 +0000 |
| commit | 5b14116a04b4b96d25f825bef8f34caf4bd51466 (patch) | |
| tree | cb624faa671d14d6363d664722502b08a5e56c81 /src | |
| parent | 371f04811e075d79741d130e2043ec8e19044dde (diff) | |
device/pci_early.c: Drop some guards
With PCI_DEV() always defined it is no longer
necessary to exclude this code from building.
Change-Id: I58a6348750d240aa6024599f7b1af1449f31e8ac
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/console/init.c | 4 | ||||
| -rw-r--r-- | src/device/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/device/pci_early.c | 7 | ||||
| -rw-r--r-- | src/include/device/pci.h | 3 |
4 files changed, 5 insertions, 12 deletions
diff --git a/src/console/init.c b/src/console/init.c index 8aa7d7df68..7d1f31a38b 100644 --- a/src/console/init.c +++ b/src/console/init.c @@ -74,10 +74,8 @@ asmlinkage void console_init(void) if (IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT)) car_set_var(console_inited, 1); -#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) - if (!ENV_SMM && !ENV_RAMSTAGE) + if (IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) && !ENV_SMM && !ENV_RAMSTAGE) pci_early_bridge_init(); -#endif console_hw_init(); diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bed0f718ee..39df1c7b9c 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -13,7 +13,6 @@ ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_64) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c -ramstage-$(CONFIG_PCI) += pci_early.c ramstage-$(CONFIG_PCI) += pci_rom.c ramstage-y += smbus_ops.c @@ -28,12 +27,10 @@ verstage-y += device_const.c romstage-y += device_const.c ramstage-y += device_const.c -ifeq ($(CONFIG_ARCH_X86),y) bootblock-$(CONFIG_PCI) += pci_early.c verstage-$(CONFIG_PCI) += pci_early.c romstage-$(CONFIG_PCI) += pci_early.c postcar-$(CONFIG_PCI) += pci_early.c -endif subdirs-y += oprom dram diff --git a/src/device/pci_early.c b/src/device/pci_early.c index 4cf8c7e68c..9086e64b85 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -18,9 +18,10 @@ #include <arch/io.h> #include <device/pci.h> #include <device/pci_def.h> +#include <device/pci_ops.h> +#include <device/pci_type.h> #include <delay.h> -#if !ENV_RAMSTAGE unsigned pci_find_next_capability(pci_devfn_t dev, unsigned cap, unsigned last) { unsigned pos = 0; @@ -68,9 +69,6 @@ unsigned pci_find_capability(pci_devfn_t dev, unsigned cap) { return pci_find_next_capability(dev, cap, 0); } -#endif - -#if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) static void pci_bridge_reset_secondary(pci_devfn_t p2p_bridge) { @@ -167,4 +165,3 @@ void pci_early_bridge_init(void) pci_early_mmio_window(p2p_bridge, CONFIG_EARLY_PCI_MMIO_BASE, 0x4000); } -#endif /* CONFIG_EARLY_PCI_BRIDGE */ diff --git a/src/include/device/pci.h b/src/include/device/pci.h index b75020551b..f0724e0f99 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -143,7 +143,6 @@ unsigned int pci_find_next_capability(struct device *dev, unsigned int cap, unsigned int pci_find_capability(struct device *dev, unsigned int cap); #endif /* __SIMPLE_DEVICE__ */ -void pci_early_bridge_init(void); void pci_early_mmio_window(pci_devfn_t p2p_bridge, u32 mmio_base, u32 mmio_size); int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base); @@ -157,4 +156,6 @@ static inline int pci_base_address_is_memory_space(unsigned int attr) #endif /* CONFIG_PCI */ +void pci_early_bridge_init(void); + #endif /* PCI_H */ |