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authorFelix Held <felix-coreboot@felixheld.de>2021-05-21 02:11:38 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-05-22 05:40:47 +0000
commit53c83897c41b6dec5db2c5e814ca69cf721c22c2 (patch)
treebceaf516e91e67645bac0679cd0653a3d4895baf /src
parentb2b5781bb4c6f8bfdce8b0ef0a4ae71ac34e006c (diff)
soc/amd/cezanne,picasso/reset: use byte I/O read for NCP_ERR
NCP_ERR is a 1 byte register in I/O-space, so use inb and not inw. The variable the result gets assigned to is also a uint8_t. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9fd8c139004111d6227c0316ba2a8b0281541654 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/reset.c2
-rw-r--r--src/soc/amd/picasso/reset.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/cezanne/reset.c b/src/soc/amd/cezanne/reset.c
index d97f79eb20..b05c0b6c47 100644
--- a/src/soc/amd/cezanne/reset.c
+++ b/src/soc/amd/cezanne/reset.c
@@ -10,7 +10,7 @@
/* TODO: is NCP_ERR still valid? It appears reserved and always 0xff. b/184281092 */
void set_warm_reset_flag(void)
{
- uint8_t ncp = inw(NCP_ERR);
+ uint8_t ncp = inb(NCP_ERR);
outb(NCP_ERR, ncp | NCP_WARM_BOOT);
}
diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c
index aae76bf4c6..84226ea6df 100644
--- a/src/soc/amd/picasso/reset.c
+++ b/src/soc/amd/picasso/reset.c
@@ -9,7 +9,7 @@
void set_warm_reset_flag(void)
{
- uint8_t ncp = inw(NCP_ERR);
+ uint8_t ncp = inb(NCP_ERR);
outb(NCP_ERR, ncp | NCP_WARM_BOOT);
}