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authorSean Rhodes <sean@starlabs.systems>2023-07-19 14:07:51 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-08-10 14:09:00 +0000
commit50a9a87d6ca42e988e6c0f943935910b7f8b3abc (patch)
treeb3cf887caff5ccb08f5eb5e59c48c38790d16821 /src
parente573e40f33e3fe1ccbab2bd61beccf24e1b207c4 (diff)
mb/starlabs/starbook/adl: Enable the crashlog PCI device
Change-Id: I8dc97ca0fb310417a28e253f378511f510c3b4b3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77124 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/starlabs/starbook/Kconfig1
-rw-r--r--src/mainboard/starlabs/starbook/variants/adl/devicetree.cb1
2 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig
index 238cd3b520..6a701794cf 100644
--- a/src/mainboard/starlabs/starbook/Kconfig
+++ b/src/mainboard/starlabs/starbook/Kconfig
@@ -64,6 +64,7 @@ config BOARD_STARLABS_STARBOOK_ADL
select MEMORY_MAPPED_TPM
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_P
+ select SOC_INTEL_CRASHLOG
select SPI_FLASH_WINBOND
select TPM_MEASURED_BOOT
diff --git a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb
index 298ec199b2..28ec738b7d 100644
--- a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb
@@ -49,7 +49,6 @@ chip soc/intel/alderlake
}"
end
device ref gna on end
- device ref crashlog off end
device ref xhci on
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_MID(OC5)"