diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-04-19 21:44:22 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-06 22:15:04 +0000 |
| commit | 4c684877d13ba634b3f8ebfaf51fc386d031e882 (patch) | |
| tree | de4a9ad947963c5ac19fce5b6d006d20814dd557 /src | |
| parent | eb8bbb6c041b360b0a463c56b820ef372d1bac50 (diff) | |
soc/amd/picasso: Use read*p
This avoids compiler warnings on 64bit builds that complains about
casting pointer to non matching integer size.
Change-Id: I29fdb73ae1c0508796a21b650bf4fd1ac6688021
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/common/block/acpi/ivrs.c | 14 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fch.c | 2 |
3 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index c5218ea6ad..b78cc53bb8 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -219,8 +219,8 @@ static unsigned long acpi_fill_ivrs40(unsigned long current, acpi_ivrs_t *ivrs) ivhd_40->iommu_attributes = ivrs->ivhd.iommu_feature_info & 0xfffe000; if (pci_read_config32(iommu_dev, ivhd_40->capability_offset) & EFR_FEATURE_SUP) { - ivhd_40->efr_reg_image_low = read32((void *)ivhd_40->iommu_base_low + 0x30); - ivhd_40->efr_reg_image_high = read32((void *)ivhd_40->iommu_base_low + 0x34); + ivhd_40->efr_reg_image_low = read32p(ivhd_40->iommu_base_low + 0x30); + ivhd_40->efr_reg_image_high = read32p(ivhd_40->iommu_base_low + 0x34); } current += sizeof(acpi_ivrs_ivhd40_t); @@ -293,8 +293,8 @@ static unsigned long acpi_fill_ivrs11(unsigned long current, acpi_ivrs_t *ivrs) ivhd_11->iommu_attributes.msi_num_ppr = ivhd11_attr_ptr->msi_num_ppr; if (pci_read_config32(iommu_dev, ivhd_11->capability_offset) & EFR_FEATURE_SUP) { - ivhd_11->efr_reg_image_low = read32((void *)ivhd_11->iommu_base_low + 0x30); - ivhd_11->efr_reg_image_high = read32((void *)ivhd_11->iommu_base_low + 0x34); + ivhd_11->efr_reg_image_low = read32p(ivhd_11->iommu_base_low + 0x30); + ivhd_11->efr_reg_image_high = read32p(ivhd_11->iommu_base_low + 0x34); } current += sizeof(acpi_ivrs_ivhd11_t); @@ -361,9 +361,9 @@ unsigned long acpi_fill_ivrs(acpi_ivrs_t *ivrs, unsigned long current) cap_offset_0 = pci_read_config32(iommu_dev, ivrs->ivhd.capability_offset); cap_offset_10 = pci_read_config32(iommu_dev, ivrs->ivhd.capability_offset + 0x10); - mmio_x18_value = read64((void *)ivrs->ivhd.iommu_base_low + 0x18); - mmio_x30_value = read64((void *)ivrs->ivhd.iommu_base_low + 0x30); - mmio_x4000_value = read64((void *)ivrs->ivhd.iommu_base_low + 0x4000); + mmio_x18_value = read64p(ivrs->ivhd.iommu_base_low + 0x18); + mmio_x30_value = read64p(ivrs->ivhd.iommu_base_low + 0x30); + mmio_x4000_value = read64p(ivrs->ivhd.iommu_base_low + 0x4000); ivrs->ivhd.flags |= ((mmio_x30_value & MMIO_EXT_FEATURE_PPR_SUP) ? IVHD_FLAG_PPE_SUP : 0); diff --git a/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c b/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c index 576c9180c8..7b3afc2b81 100644 --- a/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c +++ b/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c @@ -82,5 +82,5 @@ void handle_smi_store(void) reg_ebx = io_smi->rbx; /* drivers/smmstore/smi.c */ - io_smi->rax = smmstore_exec(sub_command, (void *)reg_ebx); + io_smi->rax = smmstore_exec(sub_command, (void *)(uintptr_t)reg_ebx); } diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 24565a75fe..00402213d8 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -109,7 +109,7 @@ static void sb_rfmux_config_override(void) for (port = 0; port < USB_PD_PORT_COUNT; port++) { if (cfg->usb_pd_config_override[port].rfmux_override_en) { - write32((void *)(USB_PD_PORT_CONTROL + PD_PORT_MUX_OFFSET(port)), + write32p(USB_PD_PORT_CONTROL + PD_PORT_MUX_OFFSET(port), cfg->usb_pd_config_override[port].rfmux_config | USB_PD_RFMUX_OVERRIDE); } |