diff options
author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-04-06 12:21:07 +0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2021-04-07 15:17:34 +0000 |
commit | 4b048fec76c1521a426e54e46fb8b26148e8c52d (patch) | |
tree | 2327b98eded78eb7735a147cad27f78f45226b5d /src | |
parent | 4bc6adcb9345f2fdf14eaa30aa77382b46525def (diff) |
mb/google/mancomb: Enable USB ports in devicetree
BUG=b:182211161
TEST=builds
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I375ad38da14189de2ae2713082a80e8cdb2fe5f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52119
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/devicetree.cb | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb index 305ba0b577..b368574f68 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb @@ -46,6 +46,72 @@ chip soc/amd/cezanne device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref gfx on end # Internal GPU (GFX) + device ref xhci_0 on # USB 3.1 (USB0) + chip drivers/usb/acpi + device ref xhci_0_root_hub on + chip drivers/usb/acpi + register "desc" = ""Rear Type-C Port"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(1, 1)" + device ref usb3_port0 on end + end + chip drivers/usb/acpi + register "desc" = ""Front Type-A Port"" + register "type" = "UPC_TYPE_USB3_A" + register "group" = "ACPI_PLD_GROUP(1, 2)" + device ref usb3_port1 on end + end + chip drivers/usb/acpi + register "desc" = ""Rear Type-C Port"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(1, 1)" + device ref usb2_port0 on end + end + chip drivers/usb/acpi + register "desc" = ""Front Type-A Port"" + register "type" = "UPC_TYPE_USB3_A" + register "group" = "ACPI_PLD_GROUP(1, 2)" + device ref usb2_port1 on end + end + end + end + end + device ref xhci_1 on # USB 3.1 (USB1) + chip drivers/usb/acpi + device ref xhci_1_root_hub on + chip drivers/usb/acpi + register "desc" = ""Front Type-C Port"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device ref usb3_port4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB HUB"" + register "type" = "UPC_TYPE_USB3_A" + register "group" = "ACPI_PLD_GROUP(2, 1)" + device ref usb3_port5 on end + end + chip drivers/usb/acpi + register "desc" = ""Front Type-C Port"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device ref usb2_port4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB HUB"" + register "type" = "UPC_TYPE_USB3_A" + register "group" = "ACPI_PLD_GROUP(2, 1)" + device ref usb2_port5 on end + end + chip drivers/usb/acpi + register "desc" = ""Bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_132)" + device ref usb2_port6 on end + end + end + end + end end device ref lpc_bridge on chip ec/google/chromeec |