diff options
author | Anastasios Koutian <akoutian2@gmail.com> | 2024-05-07 20:37:38 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-07-08 12:54:25 +0000 |
commit | 47a7fb3921a735fab05024f863c712f51b6e8fcd (patch) | |
tree | 215c10922b45146f3d0b0ce3c61bd10c49048861 /src | |
parent | 048bffc3650952b720f4d403f010ccf2c0b1b5d1 (diff) |
cpu/intel/model_206ax: Allow PL1/PL2 configuration
Tested on ThinkPad T420 with the i7-3940XM.
Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee
Signed-off-by: Anastasios Koutian <akoutian2@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/intel/model_206ax/chip.h | 4 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax_init.c | 19 |
2 files changed, 19 insertions, 4 deletions
diff --git a/src/cpu/intel/model_206ax/chip.h b/src/cpu/intel/model_206ax/chip.h index 9080e2fa12..f26fa61eca 100644 --- a/src/cpu/intel/model_206ax/chip.h +++ b/src/cpu/intel/model_206ax/chip.h @@ -42,6 +42,10 @@ struct cpu_intel_model_206ax_config { enum cpu_acpi_level acpi_c3; int tcc_offset; /* TCC Activation Offset */ + + unsigned int pl1_mw; /* Long-term power limit in milliwatts */ + unsigned int pl2_mw; /* Short-term power limit in milliwatts */ + int pp0_current_limit; /* Primary Plane Current Limit (Icc) in Amps */ int pp1_current_limit; /* Secondary Plane Current Limit (IAXG) in Amps */ diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 8a4dd3f19a..aafb4dcbad 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -96,6 +96,7 @@ int cpu_config_tdp_levels(void) */ void set_power_limits(u8 power_limit_1_time) { + struct cpu_intel_model_206ax_config *conf = DEV_PTR(cpu_bus)->chip_info; msr_t msr = rdmsr(MSR_PLATFORM_INFO); msr_t limit; unsigned int power_unit; @@ -132,16 +133,26 @@ void set_power_limits(u8 power_limit_1_time) power_limit_1_val = power_limit_time_sec_to_msr[power_limit_1_time]; - /* Set long term power limit to TDP */ limit.lo = 0; - limit.lo |= tdp & PKG_POWER_LIMIT_MASK; + if (conf->pl1_mw) { + printk(BIOS_DEBUG, "Setting PL1 to %u milliwatts\n", conf->pl1_mw); + limit.lo |= ((conf->pl1_mw * power_unit) / 1000) & PKG_POWER_LIMIT_MASK; + } else { + /* Set long term power limit to TDP */ + limit.lo |= tdp & PKG_POWER_LIMIT_MASK; + } limit.lo |= PKG_POWER_LIMIT_EN; limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) << PKG_POWER_LIMIT_TIME_SHIFT; - /* Set short term power limit to 1.25 * TDP */ limit.hi = 0; - limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; + if (conf->pl2_mw) { + printk(BIOS_DEBUG, "Setting PL2 to %u milliwatts\n", conf->pl2_mw); + limit.hi |= ((conf->pl2_mw * power_unit) / 1000) & PKG_POWER_LIMIT_MASK; + } else { + /* Set short term power limit to 1.25 * TDP */ + limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK; + } limit.hi |= PKG_POWER_LIMIT_EN; /* Power limit 2 time is only programmable on SNB EP/EX */ |