diff options
| author | Fred Reitberger <reitbergerfred@gmail.com> | 2022-07-14 11:06:30 -0400 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-16 22:52:21 +0000 |
| commit | 475e2824a8d08e6117632e1f67910f8266f1872e (patch) | |
| tree | 94d519875235bf910b472432924e06504bcf77a8 /src | |
| parent | 8de0e369e34a08c559a7a6e900e2584a9d1a9ff1 (diff) | |
soc/amd/[cezanne,picasso,sabrina]/Kconfig: Add PSP_APOB_DRAM_SIZE config option
The APOB in sabrina is larger than in cezanne/picasso and no longer
fits in the previously allocated 64K space for it. Other symbols are
placed immediately after the APOB region and end up corrupting the APOB
data on sabrina.
Add a Kconfig option to specify the APOB size in DRAM to reserve enough
memory and increase the size for sabrina to 128K
TEST=Timeless builds are identical for mandolin/majolica for PCO/CZN.
Build chausie and verify symbols do not overlap _apob region
BUG=b:224056176
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ia5dbacae67ff02fc8a6ec84b9007110ca254daa3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 4 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/root_complex.c | 2 |
5 files changed, 16 insertions, 4 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index d3a28413a8..91129e921d 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -106,6 +106,10 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x10000 + config PSP_SHAREDMEM_BASE hex default 0x2011000 if VBOOT diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 4c2a740048..d9b29bf5c2 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -62,7 +62,7 @@ BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE; * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 * | Transfer Info Structure | * +--------------------------------+ PSP_SHAREDMEM_BASE - * | APOB (64KiB) | + * | APOB (PSP_APOB_DRAM_SIZE) | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS * | Early BSP stack | * | (EARLYRAM_BSP_STACK_SIZE) | @@ -83,7 +83,7 @@ SECTIONS EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE) EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE) - REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1) + REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_DRAM_SIZE, 1) #if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 2a056a2452..30ca13237c 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -117,6 +117,10 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x10000 + config PSP_SHAREDMEM_BASE hex default 0x2011000 if VBOOT diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 654c6e3935..48d61be038 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -123,9 +123,13 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x20000 + config PSP_SHAREDMEM_BASE hex - default 0x2011000 if VBOOT + default 0x2021000 if VBOOT default 0x0 help This variable defines the base address in DRAM memory where PSP copies diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c index 76ed7650e8..c911106e6b 100644 --- a/src/soc/amd/sabrina/root_complex.c +++ b/src/soc/amd/sabrina/root_complex.c @@ -88,7 +88,7 @@ struct dptc_input { * | PSP shared (vboot workbuf) | * | (PSP_SHAREDMEM_SIZE) | * +--------------------------------+ PSP_SHAREDMEM_BASE - * | APOB (64KiB) | + * | APOB (128KiB) | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS * | Early BSP stack | * | (EARLYRAM_BSP_STACK_SIZE) | |