diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-22 22:59:16 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-12 20:59:23 +0000 |
| commit | 40ac196ba3f754872442662ec282ee033304292c (patch) | |
| tree | 25932a856f3521139886d682f552824ea0fffc63 /src | |
| parent | 83b262275c43a2ff29c9d9364f25483fd690b803 (diff) | |
mb/clevo/l140cu: add CMOS layout and defaults
Add CMOS layout and defaults files and enable CMOS options in Kconfig.
Test: changed loglevel setting, rebooted and checked the log.
Change-Id: Ia1a27818b2d12fb7578189e5748b8073c8f928e3
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46311
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/clevo/cml-u/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/cmos.default | 3 | ||||
| -rw-r--r-- | src/mainboard/clevo/cml-u/cmos.layout | 61 |
3 files changed, 66 insertions, 0 deletions
diff --git a/src/mainboard/clevo/cml-u/Kconfig b/src/mainboard/clevo/cml-u/Kconfig index c08b321630..57c9f58f37 100644 --- a/src/mainboard/clevo/cml-u/Kconfig +++ b/src/mainboard/clevo/cml-u/Kconfig @@ -9,6 +9,8 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_TABLES select HAVE_SMI_HANDLER select HAVE_SPD_IN_CBFS + select HAVE_OPTION_TABLE + select HAVE_CMOS_DEFAULT select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/clevo/cml-u/cmos.default b/src/mainboard/clevo/cml-u/cmos.default new file mode 100644 index 0000000000..f3330e5070 --- /dev/null +++ b/src/mainboard/clevo/cml-u/cmos.default @@ -0,0 +1,3 @@ +boot_option=Fallback +debug_level=Debug +power_on_after_fail=Disable diff --git a/src/mainboard/clevo/cml-u/cmos.layout b/src/mainboard/clevo/cml-u/cmos.layout new file mode 100644 index 0000000000..45ddff109f --- /dev/null +++ b/src/mainboard/clevo/cml-u/cmos.layout @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# ----------------------------------------------------------------- +entries + +# start-bit length config config-ID name +0 120 r 0 reserved_memory + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +388 4 h 0 reboot_counter + +# ----------------------------------------------------------------- +# coreboot config options: console +395 4 e 6 debug_level + +# ----------------------------------------------------------------- +# coreboot config options: cpu +400 1 e 2 hyper_threading + +# ----------------------------------------------------------------- +# coreboot config options: southbridge +410 2 e 7 power_on_after_fail + +# ----------------------------------------------------------------- +# vboot nv area +800 128 r 0 vbnv + +# ----------------------------------------------------------------- +# coreboot config options: check sums +984 16 h 0 check_sum + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +6 0 Emergency +6 1 Alert +6 2 Critical +6 3 Error +6 4 Warning +6 5 Notice +6 6 Info +6 7 Debug +6 8 Spew +7 0 Disable +7 1 Enable +7 2 Keep + +# ----------------------------------------------------------------- +checksums + +checksum 392 799 984 |