arch/io.h: Separate MMIO and PNP ops

Change-Id: Ie32f1d43168c277be46cdbd7fbfa2445d9899689
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31699
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

11 files changed, 163 insertions, 141 deletions

diff --git a/src/arch/arm/include/armv4/arch/io.h b/src/arch/arm/include/armv4/arch/mmio.h
index 9597ffed1c..ad89ef5d12 100644
--- a/src/arch/arm/include/armv4/arch/io.h
+++ b/src/arch/arm/include/armv4/arch/mmio.h
@@ -25,8 +25,9 @@
  *  12-Dec-1999	RMK	More cleanups
  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
  */
-#ifndef __ARCH_IO_H
-#define __ARCH_IO_H
+
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
 
 #include <endian.h>
 #include <stdint.h>
@@ -61,4 +62,4 @@ static inline void write32(void *addr, uint32_t val)
 	*(volatile uint32_t *)addr = val;
 }
 
-#endif	/* __ARCH_IO_H */
+#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/arm/include/armv7/arch/io.h b/src/arch/arm/include/armv7/arch/mmio.h
index 1772659fec..b245b264fd 100644
--- a/src/arch/arm/include/armv7/arch/io.h
+++ b/src/arch/arm/include/armv7/arch/mmio.h
@@ -25,8 +25,9 @@
  *  12-Dec-1999	RMK	More cleanups
  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
  */
-#ifndef __ARCH_IO_H
-#define __ARCH_IO_H
+
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
 
 #include <arch/cache.h>		/* for dmb() */
 #include <endian.h>
@@ -71,4 +72,4 @@ static inline void write32(void *addr, uint32_t val)
 	dmb();
 }
 
-#endif	/* __ARCH_IO_H */
+#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/arm64/include/armv8/arch/io.h b/src/arch/arm64/include/armv8/arch/mmio.h
index 31615f736f..aabfa87fc9 100644
--- a/src/arch/arm64/include/armv8/arch/io.h
+++ b/src/arch/arm64/include/armv8/arch/mmio.h
@@ -25,8 +25,9 @@
  *  12-Dec-1999	RMK	More cleanups
  *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
  */
-#ifndef __ARCH_IO_H
-#define __ARCH_IO_H
+
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
 
 #include <endian.h>
 #include <stdint.h>
@@ -85,4 +86,4 @@ static inline void write64(void *addr, uint64_t val)
 	dmb();
 }
 
-#endif	/* __ARCH_IO_H */
+#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/mips/include/arch/io.h b/src/arch/mips/include/arch/mmio.h
index b61db9c650..27a4944961 100644
--- a/src/arch/mips/include/arch/io.h
+++ b/src/arch/mips/include/arch/mmio.h
@@ -17,8 +17,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __MIPS_ARCH_IO_H
-#define __MIPS_ARCH_IO_H
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
 
 #include <types.h>
 #include <arch/cache.h>
diff --git a/src/arch/riscv/include/arch/io.h b/src/arch/riscv/include/arch/mmio.h
index d086d0cdb2..4cbc07bbc7 100644
--- a/src/arch/riscv/include/arch/io.h
+++ b/src/arch/riscv/include/arch/mmio.h
@@ -11,8 +11,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef _ASM_IO_H
-#define _ASM_IO_H
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
 
 #include <endian.h>
 #include <stdint.h>
@@ -57,4 +57,4 @@ static __always_inline void write64(volatile void *addr, uint64_t value)
 	*((volatile uint64_t *)(addr)) = value;
 }
 
-#endif
+#endif /* __ARCH_MMIO_H__ */
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index f0c0c80260..d39bbb3ff4 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -11,10 +11,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef _ASM_IO_H
-#define _ASM_IO_H
+#ifndef __ARCH_IO_H__
+#define __ARCH_IO_H__
 
-#include <endian.h>
 #include <stdint.h>
 
 /*
@@ -150,123 +149,4 @@ static inline void insl(uint16_t port, void *addr, unsigned long count)
 		);
 }
 
-static __always_inline uint8_t read8(
-	const volatile void *addr)
-{
-	return *((volatile uint8_t *)(addr));
-}
-
-static __always_inline uint16_t read16(
-	const volatile void *addr)
-{
-	return *((volatile uint16_t *)(addr));
-}
-
-static __always_inline uint32_t read32(
-	const volatile void *addr)
-{
-	return *((volatile uint32_t *)(addr));
-}
-
-#ifndef __ROMCC__
-static __always_inline uint64_t read64(
-	const volatile void *addr)
-{
-	return *((volatile uint64_t *)(addr));
-}
-#endif
-
-static __always_inline void write8(volatile void *addr,
-	uint8_t value)
-{
-	*((volatile uint8_t *)(addr)) = value;
-}
-
-static __always_inline void write16(volatile void *addr,
-	uint16_t value)
-{
-	*((volatile uint16_t *)(addr)) = value;
-}
-
-static __always_inline void write32(volatile void *addr,
-	uint32_t value)
-{
-	*((volatile uint32_t *)(addr)) = value;
-}
-
-#ifndef __ROMCC__
-static __always_inline void write64(volatile void *addr,
-	uint64_t value)
-{
-	*((volatile uint64_t *)(addr)) = value;
-}
-#endif
-
-#include <device/pnp_type.h>
-
-#ifdef __SIMPLE_DEVICE__
-
-/* Generic functions for pnp devices */
-static __always_inline void pnp_write_config(
-	pnp_devfn_t dev, uint8_t reg, uint8_t value)
-{
-	unsigned int port = dev >> 8;
-	outb(reg, port);
-	outb(value, port + 1);
-}
-
-static __always_inline uint8_t pnp_read_config(
-	pnp_devfn_t dev, uint8_t reg)
-{
-	unsigned int port = dev >> 8;
-	outb(reg, port);
-	return inb(port + 1);
-}
-
-static __always_inline
-void pnp_set_logical_device(pnp_devfn_t dev)
-{
-	unsigned int device = dev & 0xff;
-	pnp_write_config(dev, 0x07, device);
-}
-
-static __always_inline
-void pnp_set_enable(pnp_devfn_t dev, int enable)
-{
-	pnp_write_config(dev, 0x30, enable?0x1:0x0);
-}
-
-static __always_inline
-int pnp_read_enable(pnp_devfn_t dev)
-{
-	return !!pnp_read_config(dev, 0x30);
-}
-
-static __always_inline
-void pnp_set_iobase(pnp_devfn_t dev, unsigned int index, unsigned int iobase)
-{
-	pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
-	pnp_write_config(dev, index + 1, iobase & 0xff);
-}
-
-static __always_inline
-uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned int index)
-{
-	return ((uint16_t)(pnp_read_config(dev, index)) << 8)
-		| pnp_read_config(dev, index + 1);
-}
-
-static __always_inline
-void pnp_set_irq(pnp_devfn_t dev, unsigned int index, unsigned int irq)
-{
-	pnp_write_config(dev, index, irq);
-}
-
-static __always_inline
-void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
-{
-	pnp_write_config(dev, index, drq & 0xff);
-}
-
-#endif /* __SIMPLE_DEVICE__ */
 #endif
diff --git a/src/arch/x86/include/arch/mmio.h b/src/arch/x86/include/arch/mmio.h
new file mode 100644
index 0000000000..f271a973eb
--- /dev/null
+++ b/src/arch/x86/include/arch/mmio.h
@@ -0,0 +1,71 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_MMIO_H__
+#define __ARCH_MMIO_H__
+
+#include <stdint.h>
+
+static __always_inline uint8_t read8(
+	const volatile void *addr)
+{
+	return *((volatile uint8_t *)(addr));
+}
+
+static __always_inline uint16_t read16(
+	const volatile void *addr)
+{
+	return *((volatile uint16_t *)(addr));
+}
+
+static __always_inline uint32_t read32(
+	const volatile void *addr)
+{
+	return *((volatile uint32_t *)(addr));
+}
+
+#ifndef __ROMCC__
+static __always_inline uint64_t read64(
+	const volatile void *addr)
+{
+	return *((volatile uint64_t *)(addr));
+}
+#endif
+
+static __always_inline void write8(volatile void *addr,
+	uint8_t value)
+{
+	*((volatile uint8_t *)(addr)) = value;
+}
+
+static __always_inline void write16(volatile void *addr,
+	uint16_t value)
+{
+	*((volatile uint16_t *)(addr)) = value;
+}
+
+static __always_inline void write32(volatile void *addr,
+	uint32_t value)
+{
+	*((volatile uint32_t *)(addr)) = value;
+}
+
+#ifndef __ROMCC__
+static __always_inline void write64(volatile void *addr,
+	uint64_t value)
+{
+	*((volatile uint64_t *)(addr)) = value;
+}
+#endif
+
+#endif /* __ARCH_MMIO_H__ */
diff --git a/src/console/post.c b/src/console/post.c
index 4c3753561b..08bdaa18a9 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -14,12 +14,15 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <stdint.h>
 #include <elog.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <pc80/mc146818rtc.h>
 #include <smp/spinlock.h>
+#if IS_ENABLED(CONFIG_POST_IO)
+#include <arch/io.h>
+#endif
 
 /* Write POST information */
 
diff --git a/src/include/device/device.h b/src/include/device/device.h
index c794322d92..3b38322fcc 100644
--- a/src/include/device/device.h
+++ b/src/include/device/device.h
@@ -14,7 +14,6 @@
 #include <device/resource.h>
 #include <device/path.h>
 #include <device/pci_type.h>
-#include <arch/io.h>
 
 struct device;
 struct pci_operations;
diff --git a/src/include/device/mmio.h b/src/include/device/mmio.h
index bebf0cfbd4..34be1e8172 100644
--- a/src/include/device/mmio.h
+++ b/src/include/device/mmio.h
@@ -15,7 +15,7 @@
 #ifndef __DEVICE_MMIO_H__
 #define __DEVICE_MMIO_H__
 
-/* FIXME: We only want the volatile MMIO ops. */
-#include <arch/io.h>
+#include <arch/mmio.h>
+#include <endian.h>
 
 #endif
diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h
index 370ede8bdd..9086fdf67c 100644
--- a/src/include/device/pnp_ops.h
+++ b/src/include/device/pnp_ops.h
@@ -15,7 +15,73 @@
 #ifndef __DEVICE_PNP_OPS_H__
 #define __DEVICE_PNP_OPS_H__
 
-/* FIXME: We only want the PNP ops. */
+#include <stdint.h>
 #include <arch/io.h>
+#include <device/pnp_type.h>
+
+#ifdef __SIMPLE_DEVICE__
+
+static __always_inline void pnp_write_config(
+	pnp_devfn_t dev, uint8_t reg, uint8_t value)
+{
+	unsigned int port = dev >> 8;
+	outb(reg, port);
+	outb(value, port + 1);
+}
+
+static __always_inline uint8_t pnp_read_config(
+	pnp_devfn_t dev, uint8_t reg)
+{
+	unsigned int port = dev >> 8;
+	outb(reg, port);
+	return inb(port + 1);
+}
+
+static __always_inline
+void pnp_set_logical_device(pnp_devfn_t dev)
+{
+	unsigned int device = dev & 0xff;
+	pnp_write_config(dev, 0x07, device);
+}
+
+static __always_inline
+void pnp_set_enable(pnp_devfn_t dev, int enable)
+{
+	pnp_write_config(dev, 0x30, enable?0x1:0x0);
+}
+
+static __always_inline
+int pnp_read_enable(pnp_devfn_t dev)
+{
+	return !!pnp_read_config(dev, 0x30);
+}
+
+static __always_inline
+void pnp_set_iobase(pnp_devfn_t dev, unsigned int index, unsigned int iobase)
+{
+	pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
+	pnp_write_config(dev, index + 1, iobase & 0xff);
+}
+
+static __always_inline
+uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned int index)
+{
+	return ((uint16_t)(pnp_read_config(dev, index)) << 8)
+		| pnp_read_config(dev, index + 1);
+}
+
+static __always_inline
+void pnp_set_irq(pnp_devfn_t dev, unsigned int index, unsigned int irq)
+{
+	pnp_write_config(dev, index, irq);
+}
+
+static __always_inline
+void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
+{
+	pnp_write_config(dev, index, drq & 0xff);
+}
+
+#endif /* __SIMPLE_DEVICE__ */
 
 #endif