diff options
author | Martin Roth <martinroth@chromium.org> | 2021-04-21 16:30:42 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-23 15:27:23 +0000 |
commit | 3df27a66a11fa1832b7f09f04f86792568ff6edb (patch) | |
tree | 0e46f1d8d94a129609f59831f98d95dec2321e5b /src | |
parent | 7e241bff1883eba2b904cac06497670fd3440953 (diff) |
mb/google/guybrush: Update memory configuration
The next guybrush build uses 2 new LPDDR4X memory chips:
- Micro MT53E1G32D2NP-046 WT:B
- Hynix H9HCNNNBKMMLXR-NEE
The MT53E2G32D4NQ-046 WT:A chip has been added to the global LPDDR4X
list since the last time guybrush was updated, so that's brought into
the guybrush SPD directory as lp4x-spd-10.hex, but it's not used.
BUG=b:186027256
TEST=Build only
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Ia5efd548f8b9442fb3703518387175aba8933a33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
5 files changed, 40 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/spd/lp4x-spd-10.hex b/src/mainboard/google/guybrush/spd/lp4x-spd-10.hex new file mode 100644 index 0000000000..efeca0a51b --- /dev/null +++ b/src/mainboard/google/guybrush/spd/lp4x-spd-10.hex @@ -0,0 +1,32 @@ +23 11 11 0E 17 29 94 08 00 00 00 00 0A 22 00 00 +00 00 04 FF 92 54 05 00 87 00 90 A8 90 E0 0B F0 +05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 E5 00 E0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/guybrush/spd/lp4x_spd_manifest.generated.txt b/src/mainboard/google/guybrush/spd/lp4x_spd_manifest.generated.txt index ea88b36a3e..b8bedddd2a 100644 --- a/src/mainboard/google/guybrush/spd/lp4x_spd_manifest.generated.txt +++ b/src/mainboard/google/guybrush/spd/lp4x_spd_manifest.generated.txt @@ -3,6 +3,7 @@ H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex K4U6E3S4AA-MGCL,lp4x-spd-1.hex K4UBE3D4AA-MGCL,lp4x-spd-3.hex MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex +MT53E1G32D2NP-046 WT:B,lp4x-spd-5.hex H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex @@ -19,3 +20,4 @@ MT53D1G64D4NW-046 WT:A,lp4x-spd-6.hex MT53D512M64D4NW-046 WT:F,lp4x-spd-5.hex NT6AP256T32AV-J1,lp4x-spd-9.hex MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex +MT53E2G32D4NQ-046 WT:A,lp4x-spd-10.hex diff --git a/src/mainboard/google/guybrush/variants/guybrush/memory/Makefile.inc b/src/mainboard/google/guybrush/variants/guybrush/memory/Makefile.inc index 966a206a6b..e6909c1780 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/memory/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/guybrush/memory/Makefile.inc @@ -3,5 +3,6 @@ SPD_SOURCES = SPD_SOURCES += lp4x-spd-4.hex # ID = 0(0b0000) Parts = MT53E1G32D2NP-046 WT:A -SPD_SOURCES += lp4x-spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F +SPD_SOURCES += lp4x-spd-1.hex # ID = 1(0b0001) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE SPD_SOURCES += lp4x-spd-9.hex # ID = 2(0b0010) Parts = NT6AP256T32AV-J1 +SPD_SOURCES += lp4x-spd-5.hex # ID = 3(0b0011) Parts = MT53E1G32D2NP-046 WT:B diff --git a/src/mainboard/google/guybrush/variants/guybrush/memory/dram_id.generated.txt b/src/mainboard/google/guybrush/variants/guybrush/memory/dram_id.generated.txt index a7b644608e..614ff905b3 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/memory/dram_id.generated.txt +++ b/src/mainboard/google/guybrush/variants/guybrush/memory/dram_id.generated.txt @@ -2,3 +2,5 @@ DRAM Part Name ID to assign MT53E1G32D2NP-046 WT:A 0 (0000) MT53E512M32D2NP-046 WT:F 1 (0001) NT6AP256T32AV-J1 2 (0010) +H9HCNNNBKMMLXR-NEE 1 (0001) +MT53E1G32D2NP-046 WT:B 3 (0011) diff --git a/src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt b/src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt index 75b007a742..b267e539f1 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt +++ b/src/mainboard/google/guybrush/variants/guybrush/memory/mem_list_variant.txt @@ -1,3 +1,5 @@ MT53E1G32D2NP-046 WT:A MT53E512M32D2NP-046 WT:F NT6AP256T32AV-J1 +H9HCNNNBKMMLXR-NEE +MT53E1G32D2NP-046 WT:B |