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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-23 00:45:40 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-26 20:01:55 +0000
commit39789eb6955040a26b5b9d7614790e565be2fada (patch)
tree2981a928ff05273d7fd7d7c34c119a766e234597 /src
parentcefee5e40f4e7567b25bce9df786a0fbf594a268 (diff)
cpu/x86: drop CPU_X86_LAPIC Kconfig option
All x86 CPUs in the coreboot tree have a local APIC, so the corresponding code can be unconditionally included in the build. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifc354fb386977b0fca4caa72c03aa77a20bc348e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/x86/Kconfig4
-rw-r--r--src/cpu/x86/Makefile.inc2
2 files changed, 1 insertions, 5 deletions
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index a289325523..bae38891ad 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -4,10 +4,6 @@ config CPU_X86_CACHE_HELPER
help
Add the x86_enable_cache ramstage helper function to the build.
-config CPU_X86_LAPIC
- bool
- default y
-
config PARALLEL_MP
def_bool y
depends on !LEGACY_SMP_INIT
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index a6c51d023a..19c9e03a02 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -1,5 +1,5 @@
subdirs-$(CONFIG_CPU_X86_CACHE_HELPER) += cache
-subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic
+subdirs-y += lapic
subdirs-y += mtrr
subdirs-y += pae
subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm