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authorScott Chao <scott_chao@wistron.corp-partner.google.com>2021-07-23 16:41:48 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-08-02 17:37:20 +0000
commit37d14cfd30905cee040f2cd4c064897720df4345 (patch)
tree02d98e2e40a914843f581fa9fb0a4286ef45f785 /src
parent35041339dcd59a4a6c5ad29a4d0cf88e8526eed8 (diff)
mb/google/brya/variants/gimble: configure correct type-c port
Change TypeC port1 usb3 port="3". BUG=b:194472269 TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error. Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: Iaba27aad2adfb0a9e83058ac756ca46a762107bc Reviewed-on: https://review.coreboot.org/c/coreboot/+/56545 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/gimble/overridetree.cb10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb
index 914a8bfb03..15275bd56a 100644
--- a/src/mainboard/google/brya/variants/gimble/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb
@@ -191,7 +191,6 @@ chip soc/intel/alderlake
chip ec/google/chromeec
use conn0 as mux_conn[0]
use conn1 as mux_conn[1]
- use conn2 as mux_conn[2]
device pnp 0c09.0 on end
end
end
@@ -205,13 +204,8 @@ chip soc/intel/alderlake
end
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "2"
- register "usb3_port_number" = "2"
- device generic 1 alias conn1 on end
- end
- chip drivers/intel/pmc_mux/conn
- register "usb2_port_number" = "3"
register "usb3_port_number" = "3"
- device generic 2 alias conn2 on end
+ device generic 1 alias conn1 on end
end
end
end
@@ -229,7 +223,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C1 (DB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "group" = "ACPI_PLD_GROUP(2, 1)"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port3 on end
end
end
end