diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2017-04-13 01:38:43 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2017-04-14 04:20:09 +0200 |
| commit | 30783d84cffcb5a997e8d0f4061e3a7962b6417c (patch) | |
| tree | 07cc7ffb4ca43ecbd92e31917643123d3bfffb47 /src | |
| parent | a0729d9a561c335b9f7b179602da1c9ed8b34ba5 (diff) | |
mainboard/google/eve: Enable internal pull-down on USB_C{0,1}_DP_HPD
These lines act as inputs to both EC and AP and when the corresponding
TCPC mux is in low power mode the line is floating. Add an internal
pull-down to each GPIO to prevent it from floating in this state.
BUG=b:35775012
BRANCH=none
TEST=Verify that the kernel does not see a device present on DP when
the TCPC mux is in low power mode.
Change-Id: Ie229f84871e9994467c0ab660cc7e271a51d9cbb
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/19263
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/eve/gpio.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h index 43f2f623fd..c4c73aecfa 100644 --- a/src/mainboard/google/eve/gpio.h +++ b/src/mainboard/google/eve/gpio.h @@ -158,8 +158,8 @@ static const struct pad_config gpio_table[] = { /* USB2_OC1# */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* USB_C1_OC_ODL */ /* USB2_OC2# */ PAD_CFG_GPO(GPP_E11, 1, DEEP), /* TOUCHSCREEN_STOP_L */ /* USB2_OC3# */ PAD_CFG_NC(GPP_E12), -/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* USB_C0_DP_HPD */ -/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* USB_C1_DP_HPD */ +/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, 20K_PD, DEEP, NF1), /* USB_C0_DP_HPD */ +/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, 20K_PD, DEEP, NF1), /* USB_C1_DP_HPD */ /* DDPD_HPD2 */ PAD_CFG_NC(GPP_E15), /* TP48 */ /* DDPE_HPD3 */ PAD_CFG_NC(GPP_E16), /* TP244 */ /* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), |