diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2023-01-17 21:37:51 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-10 13:43:16 +0000 |
| commit | 2d696516fdf8ef13a8c352a46dd9b9a27ba6d0cc (patch) | |
| tree | 60b0f11bf644f5c36171516d226ee5df51d5b291 /src | |
| parent | 0e3d18b130639f0c292eb998e629339236b93979 (diff) | |
mb/starlabs/starbook/{tgl,adl}: Set DmiMaxLinkSpeed to 4
Set DmiMaxLinkSpeed to 4 in FSP to ensure that FSP always supports
PCIe Gen 4 drives.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I0e31919122dacfbdc2486fa8216a28b479f3bd00
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/adl/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/starlabs/starbook/variants/tgl/romstage.c | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c index 29beea39d1..17629b460d 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c @@ -33,4 +33,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) /* Enable/Disable Wireless (RP05) based on CMOS settings */ if (get_uint_option("wireless", 1) == 0) mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 4); + + mupd->FspmConfig.DmiMaxLinkSpeed = 4; }; diff --git a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c index 41e7f6dc4d..ceeb754813 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/romstage.c @@ -37,4 +37,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mupd->FspmConfig.TcssDma0En = 0; mupd->FspmConfig.TcssItbtPcie0En = 0; } + mupd->FspmConfig.DmiMaxLinkSpeed = 4; }; |