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authorSean Rhodes <sean@starlabs.systems>2022-02-24 10:43:26 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-03-08 15:02:17 +0000
commit2ba886aa6c94990b0708a78c85e3c4f8fb702185 (patch)
treeeac79100b05893c331dbf7cc62ce302716973ea6 /src
parent4b2490eed629801cfb59dc2bf20cccebba8daa0a (diff)
ec/starlabs/merlin: Use ECRD function
Use ECRD function, instead of getting raw values from emem, to avoid a lack of syncronisation as it uses a mutex. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I31113ef9af3a1e171e3e1f226e7adcfa0fbce61b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/ec/starlabs/merlin/acpi/ac.asl2
-rw-r--r--src/ec/starlabs/merlin/acpi/lid.asl2
-rw-r--r--src/ec/starlabs/merlin/acpi/suspend.asl12
3 files changed, 10 insertions, 6 deletions
diff --git a/src/ec/starlabs/merlin/acpi/ac.asl b/src/ec/starlabs/merlin/acpi/ac.asl
index 847f872e50..01dcca90a3 100644
--- a/src/ec/starlabs/merlin/acpi/ac.asl
+++ b/src/ec/starlabs/merlin/acpi/ac.asl
@@ -9,7 +9,7 @@ Device (ADP1)
}
Method (_PSR, 0)
{
- PWRS = ECPS & 0x01
+ PWRS = (ECRD (RefOf(ECPS)) & 0x01)
Return (PWRS)
}
Method (_PCL, 0)
diff --git a/src/ec/starlabs/merlin/acpi/lid.asl b/src/ec/starlabs/merlin/acpi/lid.asl
index 936eeed7ec..0eaa2c5bae 100644
--- a/src/ec/starlabs/merlin/acpi/lid.asl
+++ b/src/ec/starlabs/merlin/acpi/lid.asl
@@ -11,6 +11,6 @@ Device (LID0)
{
// 0x00 == Closed
// 0x01 == Open
- Return (^^LSTE)
+ Return (ECRD (RefOf (LSTE)))
}
}
diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl
index 08ca787113..2dae8dae68 100644
--- a/src/ec/starlabs/merlin/acpi/suspend.asl
+++ b/src/ec/starlabs/merlin/acpi/suspend.asl
@@ -7,10 +7,14 @@ Method (RPTS, 1, NotSerialized)
If ((Arg0 == 0x04) || (Arg0 == 0x05))
{
/* Store current EC settings in CMOS */
- \_SB.PCI0.LPCB.TPLC = \_SB.PCI0.LPCB.EC.TPLE
- \_SB.PCI0.LPCB.FLKC = \_SB.PCI0.LPCB.EC.FLKE
- \_SB.PCI0.LPCB.KLSC = \_SB.PCI0.LPCB.EC.KLSE
- \_SB.PCI0.LPCB.KLBC = \_SB.PCI0.LPCB.EC.KLBE
+ \_SB.PCI0.LPCB.TPLC =
+ \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE))
+ \_SB.PCI0.LPCB.FLKC =
+ \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE))
+ \_SB.PCI0.LPCB.KLSC =
+ \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLSE))
+ \_SB.PCI0.LPCB.KLBC =
+ \_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLBE))
}
}