diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-08-05 19:43:48 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-03 15:56:54 +0000 |
| commit | 2909b487a298e003e8bb433a0ac80e19ec322bdf (patch) | |
| tree | 9b64b9f84b859c23b71aa15c64fce09a792ef069 /src | |
| parent | 4b027690b658173719d3d24e43415e68650c26e7 (diff) | |
mb/pcengines/apu2: add and use IOMUX defines
Add GPIO IOMUX defines for the pins that are used in the mainboard code
which enables using the PAD_GPI and PAD_GPO macros.
TEST=Timeless build for APU2/3/4/5 results in identical binary.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie32df9ed2cb6a5670a29cff91e085a3585c8bcf7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/pcengines/apu2/gpio_ftns.h | 14 | ||||
| -rw-r--r-- | src/mainboard/pcengines/apu2/romstage.c | 40 |
2 files changed, 30 insertions, 24 deletions
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.h b/src/mainboard/pcengines/apu2/gpio_ftns.h index 638622076e..fb4edd97c4 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.h +++ b/src/mainboard/pcengines/apu2/gpio_ftns.h @@ -26,4 +26,18 @@ int get_spd_offset(void); #define GPIO_68 0x48 // PE4_WDIS (SIMSWAP1 on APU5) #define GPIO_71 0x4D // PROCHOT +#define GPIO_22_IOMUX_GPIOxx 0 +#define GPIO_32_IOMUX_GPIOxx 0 +#define GPIO_33_IOMUX_GPIOxx 0 +#define GPIO_49_IOMUX_GPIOxx 2 +#define GPIO_50_IOMUX_GPIOxx 2 +#define GPIO_51_IOMUX_GPIOxx 2 +#define GPIO_55_IOMUX_GPIOxx 3 +#define GPIO_57_IOMUX_GPIOxx 1 +#define GPIO_58_IOMUX_GPIOxx 1 +#define GPIO_59_IOMUX_GPIOxx 3 +#define GPIO_64_IOMUX_GPIOxx 2 +#define GPIO_68_IOMUX_GPIOxx 0 +#define GPIO_71_IOMUX_GPIOxx 0 + #endif /* GPIO_FTNS_H */ diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 9b1435ac79..5d2b988fbc 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -31,39 +31,31 @@ void board_BeforeAgesa(struct sysinfo *cb) } const struct soc_amd_gpio gpio_common[] = { - /* Output disabled, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_49, Function2, PAD_PULL(PULL_NONE)), - PAD_CFG_STRUCT(GPIO_50, Function2, PAD_PULL(PULL_NONE)), - PAD_CFG_STRUCT(GPIO_71, Function0, PAD_PULL(PULL_NONE)), - /* Output enabled, value low, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_57, Function1, PAD_OUTPUT(LOW)), - PAD_CFG_STRUCT(GPIO_58, Function1, PAD_OUTPUT(LOW)), - PAD_CFG_STRUCT(GPIO_59, Function3, PAD_OUTPUT(LOW)), - /* Output enabled, value high, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_51, Function2, PAD_OUTPUT(HIGH)), - PAD_CFG_STRUCT(GPIO_55, Function3, PAD_OUTPUT(HIGH)), - PAD_CFG_STRUCT(GPIO_64, Function2, PAD_OUTPUT(HIGH)), - PAD_CFG_STRUCT(GPIO_68, Function0, PAD_OUTPUT(HIGH)), + PAD_GPI(GPIO_49, PULL_NONE), + PAD_GPI(GPIO_50, PULL_NONE), + PAD_GPI(GPIO_71, PULL_NONE), + PAD_GPO(GPIO_57, LOW), + PAD_GPO(GPIO_58, LOW), + PAD_GPO(GPIO_59, LOW), + PAD_GPO(GPIO_51, HIGH), + PAD_GPO(GPIO_55, HIGH), + PAD_GPO(GPIO_64, HIGH), + PAD_GPO(GPIO_68, HIGH), }; const struct soc_amd_gpio gpio_apu2[] = { - /* Output disabled, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_32, Function0, PAD_PULL(PULL_NONE)), + PAD_GPI(GPIO_32, PULL_NONE), }; const struct soc_amd_gpio gpio_apu34[] = { - /* Output disabled, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_32, Function0, PAD_PULL(PULL_NONE)), - /* Output enabled, value low, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_33, Function0, PAD_OUTPUT(LOW)), + PAD_GPI(GPIO_32, PULL_NONE), + PAD_GPO(GPIO_33, LOW), }; const struct soc_amd_gpio gpio_apu5[] = { - /* Output disabled, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_22, Function0, PAD_PULL(PULL_NONE)), - /* Output enabled, value high, pull up/down disabled */ - PAD_CFG_STRUCT(GPIO_32, Function0, PAD_OUTPUT(HIGH)), - PAD_CFG_STRUCT(GPIO_33, Function0, PAD_OUTPUT(HIGH)), + PAD_GPI(GPIO_22, PULL_NONE), + PAD_GPO(GPIO_32, HIGH), + PAD_GPO(GPIO_33, HIGH), }; static void early_lpc_init(void) |