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authorRobert Chen <robert.chen@quanta.corp-partner.google.com>2023-08-23 02:36:50 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-09-22 18:44:46 +0000
commit242bed2ec5a07377d34d77e402e57e5435f86052 (patch)
tree7d2eaaca8394efb66f253914248f56292847d24b /src
parent4a0b599ad6101f6aa8300278ace3275cb80c8973 (diff)
mb/google/nissa/var/quandiso: Add P-sensor support
- GPIO changes: GPP_B5 ==> I2C_P_SENSOR_SDA GPP_B6 ==> I2C_P_SENSOR_SCL GPP_H19 ==> P_SENSOR_INT_L - I2C SX9324 support - Disable GPIOs when sub board LTE not used BUG=b:296506936 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: I5ed82b125b6c594225efca418017ef42f4f63b9d Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77392 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/Kconfig.name2
-rw-r--r--src/mainboard/google/brya/variants/quandiso/fw_config.c6
-rw-r--r--src/mainboard/google/brya/variants/quandiso/gpio.c9
-rw-r--r--src/mainboard/google/brya/variants/quandiso/overridetree.cb54
4 files changed, 68 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index 60918b3a97..95acffdc65 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -294,6 +294,8 @@ config BOARD_GOOGLE_QUANDISO
select CHROMEOS_WIFI_SAR if CHROMEOS
select DRIVERS_GENESYSLOGIC_GL9750
select DRIVERS_GENERIC_GPIO_KEYS
+ select DRIVERS_I2C_SX9324
+ select DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER
select HAVE_WWAN_POWER_SEQUENCE
config BOARD_GOOGLE_REDRIX
diff --git a/src/mainboard/google/brya/variants/quandiso/fw_config.c b/src/mainboard/google/brya/variants/quandiso/fw_config.c
index 5efde122d3..e9a81a4b89 100644
--- a/src/mainboard/google/brya/variants/quandiso/fw_config.c
+++ b/src/mainboard/google/brya/variants/quandiso/fw_config.c
@@ -9,10 +9,16 @@
static const struct pad_config lte_disable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_NC(GPP_A8, NONE),
+ /* B5 : I2C_P_SENSOR_SDA */
+ PAD_NC(GPP_B5, NONE),
+ /* B6 : I2C_P_SENSOR_SCL */
+ PAD_NC(GPP_B6, NONE),
/* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */
PAD_NC(GPP_F12, NONE),
+ /* H19 : P_SENSOR_INT_L */
+ PAD_NC(GPP_H19, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_NC(GPP_H23, NONE),
};
diff --git a/src/mainboard/google/brya/variants/quandiso/gpio.c b/src/mainboard/google/brya/variants/quandiso/gpio.c
index f81650edc3..f98b5f8d15 100644
--- a/src/mainboard/google/brya/variants/quandiso/gpio.c
+++ b/src/mainboard/google/brya/variants/quandiso/gpio.c
@@ -16,6 +16,11 @@ static const struct pad_config override_gpio_table[] = {
/* A22 : GPP_A22 ==> USB_C1_AUX_DC_N */
PAD_CFG_GPO(GPP_A22, 1, DEEP),
+ /* B5 : I2C2_SDA ==> I2C_P_SENSOR_SDA */
+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2),
+ /* B6 : I2C2_SCL ==> I2C_P_SENSOR_SCL */
+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2),
+
/* D3 : WCAM_RST_L ==> NC */
PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D6 : WWAN_EN */
@@ -42,8 +47,8 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
/* H17 : HDMI_SRC_SDA */
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
- /* H19 : SRCCLKREQ4# ==> NC */
- PAD_NC(GPP_H19, NONE),
+ /* H19 : SRCCLKREQ4# ==> P_SENSOR_INT_L */
+ PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
};
diff --git a/src/mainboard/google/brya/variants/quandiso/overridetree.cb b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
index 129f186bf9..7023556b92 100644
--- a/src/mainboard/google/brya/variants/quandiso/overridetree.cb
+++ b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
@@ -106,7 +106,7 @@ chip soc/intel/alderlake
#| | required to set up a BAR |
#| | for TPM communication |
#| I2C1 | Touchscreen |
- #| I2C2 | WCAM |
+ #| I2C2 | P-sensor |
#| I2C3 | Audio |
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
@@ -280,6 +280,58 @@ chip soc/intel/alderlake
end
end
end
+ device ref i2c2 on
+ chip drivers/i2c/sx9324
+ register "desc" = ""SAR Proximity Sensor""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
+ register "speed" = "I2C_SPEED_FAST"
+ register "uid" = "1"
+ register "reg_gnrl_ctrl0" = "0x16"
+ register "reg_gnrl_ctrl1" = "0x21"
+ register "reg_afe_ctrl0" = "0x00"
+ register "reg_afe_ctrl1" = "0x10"
+ register "reg_afe_ctrl2" = "0x00"
+ register "reg_afe_ctrl3" = "0x00"
+ register "reg_afe_ctrl4" = "0x07"
+ register "reg_afe_ctrl5" = "0x00"
+ register "reg_afe_ctrl6" = "0x00"
+ register "reg_afe_ctrl7" = "0x07"
+ register "reg_afe_ctrl8" = "0x12"
+ register "reg_afe_ctrl9" = "0x0f"
+ register "reg_prox_ctrl0" = "0x12"
+ register "reg_prox_ctrl1" = "0x12"
+ register "reg_prox_ctrl2" = "0x90"
+ register "reg_prox_ctrl3" = "0x60"
+ register "reg_prox_ctrl4" = "0x0c"
+ register "reg_prox_ctrl5" = "0x12"
+ register "reg_prox_ctrl6" = "0x3c"
+ register "reg_prox_ctrl7" = "0x58"
+ register "reg_adv_ctrl0" = "0x00"
+ register "reg_adv_ctrl1" = "0x00"
+ register "reg_adv_ctrl2" = "0x00"
+ register "reg_adv_ctrl3" = "0x00"
+ register "reg_adv_ctrl4" = "0x00"
+ register "reg_adv_ctrl5" = "0x05"
+ register "reg_adv_ctrl6" = "0x00"
+ register "reg_adv_ctrl7" = "0x00"
+ register "reg_adv_ctrl8" = "0x00"
+ register "reg_adv_ctrl9" = "0x00"
+ register "reg_adv_ctrl10" = "0x5c"
+ register "reg_adv_ctrl11" = "0x52"
+ register "reg_adv_ctrl12" = "0xb5"
+ register "reg_adv_ctrl13" = "0x00"
+ register "reg_adv_ctrl14" = "0x80"
+ register "reg_adv_ctrl15" = "0x0c"
+ register "reg_adv_ctrl16" = "0x38"
+ register "reg_adv_ctrl17" = "0x56"
+ register "reg_adv_ctrl18" = "0x33"
+ register "reg_adv_ctrl19" = "0xf0"
+ register "reg_adv_ctrl20" = "0xf0"
+ device i2c 28 on
+ probe DB_USB DB_1C_LTE
+ end
+ end
+ end
device ref i2c3 on
chip drivers/i2c/generic
register "hid" = ""RTL5682""