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authorFelix Singer <felixsinger@posteo.net>2021-12-30 01:54:10 +0100
committerFelix Singer <felixsinger@posteo.net>2021-12-31 08:55:43 +0000
commit1bdac6a8e71d6dc5de90fc74dde2465ed6dc77eb (patch)
treed99df5e588c8fef09073b630723fc6eea4159ecc /src
parent26fbcc91d6426ebf157639793b92d87197a35d8b (diff)
soc/intel/apollolake/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: I4d6039affd9688a2e795d69f699d5baf688ba2e4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/apollolake/acpi/gpiolib.asl2
-rw-r--r--src/soc/intel/apollolake/acpi/northbridge.asl4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/acpi/gpiolib.asl b/src/soc/intel/apollolake/acpi/gpiolib.asl
index 0ec9140721..e01d54959e 100644
--- a/src/soc/intel/apollolake/acpi/gpiolib.asl
+++ b/src/soc/intel/apollolake/acpi/gpiolib.asl
@@ -69,7 +69,7 @@ Scope (\_SB)
Method (CHSA, 0x1, Serialized)
{
/* Arg0 - GPIO pad offset relative to the community */
- Add (HOSTSW_OWN_REG_0, Multiply (Divide (Arg0, 32), 4), Local1)
+ Local1 = HOSTSW_OWN_REG_0 + Multiply (Divide (Arg0, 32), 4)
Return (Local1)
}
diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index 929bdd1455..1b59097772 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -83,7 +83,7 @@ Method (_CRS, 0, Serialized)
And(\_SB.PCI0.MCHC.MCNF, 0xF0000000, PMAX)
/* Calculate PCI MMIO Length */
- Add(Subtract(PMAX, PMIN), 1, PLEN)
+ PLEN = Subtract(PMAX, PMIN) + 1
/* Find GFX resource area in GCRS */
CreateDwordField(MCRS, STOM._MIN, GMIN)
@@ -96,7 +96,7 @@ Method (_CRS, 0, Serialized)
/* Read TOLUD */
And(\_SB.PCI0.MCHC.TLUD, 0xFFF00000, GMAX)
Decrement(GMAX)
- Add(Subtract(GMAX, GMIN), 1, GLEN)
+ GLEN = Subtract(GMAX, GMIN) + 1
/* Patch PM02 range based on Memory Size */
If (LEqual (A4GS, 0)) {