summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorMichał Żygowski <michal.zygowski@3mdeb.com>2023-03-22 11:07:22 +0100
committerMichał Żygowski <michal.zygowski@3mdeb.com>2023-03-23 08:46:34 +0000
commit14701a4df3cd40fe1eb817e8a1b3bfa064e7f7c1 (patch)
tree998826488d1798e075f3bba9a9d91b4f0301a9f6 /src
parent496e4e95c4cba9f5414cd8137fa151a9b3fe0b21 (diff)
soc/intel/elkhartlake: Define DIMM_SPD_SIZE in SoC Kconfig
The default SPD size is set to 256 bytes, instead of 512 for LPDDR4/DDR4 if not overridden by the mainboard Kconfig. This caused the SMBus libraries to read only the lower half of the DIMM SPD on protectli/vault_ehl. The lower half of the SPD passed to FSP causes a bug in DIMM change detection, which relies on the CRC of the manufacturer bytes in the upper half of the SPD (CRC of zero bytes always gives zero so no change was assumed). Setting the DIMM SPD size to 512 fixes it. Setting the SPD size in SoC will also avoid such problems in the future Elkhart Lake ports. Elkhart Lake supports only LPDDR4/DDR4 so providing the correct default of 512 bytes is an obvious thing to do. TEST=Boot Protectli VP2420 (vault_ehl) with different DIMMs and see FSP is retraining the memory instead of doing the fastboot with old DIMM data. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I998ed8781951034419cadc26c04ff1e0a124b267 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73933 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/siemens/mc_ehl/Kconfig3
-rw-r--r--src/soc/intel/elkhartlake/Kconfig4
2 files changed, 4 insertions, 3 deletions
diff --git a/src/mainboard/siemens/mc_ehl/Kconfig b/src/mainboard/siemens/mc_ehl/Kconfig
index 4fd6c1a2c4..60757fe12d 100644
--- a/src/mainboard/siemens/mc_ehl/Kconfig
+++ b/src/mainboard/siemens/mc_ehl/Kconfig
@@ -31,9 +31,6 @@ config MAINBOARD_PART_NUMBER
config DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb"
-config DIMM_SPD_SIZE
- default 512
-
config SOC_INTEL_ELKHARTLAKE_TCO_NO_REBOOT_EN
default y
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index c71ebf3649..9e7f3eba05 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -272,4 +272,8 @@ config SOC_INTEL_ELKHARTLAKE_TCO_NO_REBOOT_EN
for the second time. Since this feature is not exposed to the OS in the
standard TCO interface, this setting can be enabled on firmware level.
This might be useful depending on the TCO policy.
+
+config DIMM_SPD_SIZE
+ default 512
+
endif