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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-22 14:31:36 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-01-23 20:21:14 +0000
commit10f7f997ad439681b959962682cafc1993677c56 (patch)
tree6c446991e17796acf2c95fb9082135b728bfa14c /src
parentac0dc4a8401e4531aa60a56d9ad4dfa0450eca78 (diff)
soc/amd: Rename chipset_state to chipset_power_state
To implement some common helpers for CBMEM_ID_POWER_STATE allocation use the same struct name as soc/intel. Change-Id: I5d2c06a2a7b4602374562197c99b0ad7bcf50afb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/common/block/acpi/pm_state.c2
-rw-r--r--src/soc/amd/picasso/fch.c2
-rw-r--r--src/soc/amd/picasso/include/soc/acpi.h2
-rw-r--r--src/soc/amd/picasso/romstage.c4
-rw-r--r--src/soc/amd/stoneyridge/include/soc/acpi.h2
-rw-r--r--src/soc/amd/stoneyridge/southbridge.c2
6 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/amd/common/block/acpi/pm_state.c b/src/soc/amd/common/block/acpi/pm_state.c
index 5b7567549a..1a1c9b218b 100644
--- a/src/soc/amd/common/block/acpi/pm_state.c
+++ b/src/soc/amd/common/block/acpi/pm_state.c
@@ -51,7 +51,7 @@ static void pm_fill_gnvs(const struct acpi_pm_gpe_state *state)
static void set_nvs_sws(void *unused)
{
- struct chipset_state *state;
+ struct chipset_power_state *state;
state = cbmem_find(CBMEM_ID_POWER_STATE);
if (state == NULL)
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index b18fac4fbc..730e636e57 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -205,7 +205,7 @@ static void gpp_clk_setup(void)
void southbridge_init(void *chip_info)
{
- struct chipset_state *state;
+ struct chipset_power_state *state;
i2c_soc_init();
sb_init_acpi_ports();
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index 1f68d78bd8..dc63d0099a 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -18,7 +18,7 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
const char *soc_acpi_name(const struct device *dev);
/* Object to capture state of chipset for logging events. */
-struct chipset_state {
+struct chipset_power_state {
struct acpi_pm_gpe_state gpe_state;
struct gpio_wake_state gpio_state;
};
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index bf66759a94..91b316cd78 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -20,7 +20,7 @@
#include "chip.h"
#include <fsp/api.h>
-static struct chipset_state chipset_state;
+static struct chipset_power_state chipset_state;
static void fill_chipset_state(void)
{
@@ -30,7 +30,7 @@ static void fill_chipset_state(void)
static void add_chipset_state_cbmem(int unused)
{
- struct chipset_state *state;
+ struct chipset_power_state *state;
state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index 1430478c43..a498eb9370 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -17,7 +17,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
const char *soc_acpi_name(const struct device *dev);
-struct chipset_state {
+struct chipset_power_state {
struct acpi_pm_gpe_state gpe_state;
};
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 25781c29b7..2a380969e0 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -404,7 +404,7 @@ static void sb_init_acpi_ports(void)
void southbridge_init(void *chip_info)
{
- struct chipset_state *state;
+ struct chipset_power_state *state;
sb_init_acpi_ports();