diff options
| author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-05-18 17:35:31 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-20 11:20:46 +0000 |
| commit | 100514d8c7fdfea17de938cddc63f1457dd3af3a (patch) | |
| tree | b6df201fa92cfd5e96ce8f59f6cc0b2304378a00 /src | |
| parent | a68824185eeff91b89bf4d899b3a90f454365d0a (diff) | |
soc/intel/ehl: Fix logical bug for PseTsnGbePhyInterfaceType
By right if PseTsnGbeSgmiiEnable is disable,
PseTsnGbePhyInterfaceType should use RGMII setting.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: If593a5534716a9e93f99cb155fb5e86e12b1df17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/elkhartlake/fsp_params.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 2100cc4ded..aacb1e6f85 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -134,7 +134,7 @@ static void fill_fsps_tsn_params(FSP_S_CONFIG *params, params->PseTsnGbeMultiVcEnable[i] = config->PseTsnGbeMultiVcEnable[i]; params->PseTsnGbeSgmiiEnable[i] = config->PseTsnGbeSgmiiEnable[i]; params->PseTsnGbePhyInterfaceType[i] = - !!config->PseTsnGbeSgmiiEnable[i] ? + !config->PseTsnGbeSgmiiEnable[i] ? RGMII : config->PseTsnGbePhyType[i]; params->PseTsnGbeLinkSpeed[i] = (params->PseTsnGbePhyInterfaceType[i] < SGMII_plus) ? |