diff options
| author | Reka Norman <rekanorman@google.com> | 2022-01-31 12:36:34 +1100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-03 14:50:22 +0000 |
| commit | 0d390195a30bdaab9d8849d8be99d5e1eda0d14f (patch) | |
| tree | 8e243e85e33ad72fb1bc1e224415266c0be5d076 /src | |
| parent | 3c5da531ce7a062923d6b8e33da6982a34107231 (diff) | |
mb/google/brya: Override memory ID to 0 for nivviks and nereid P0
In the nivviks and nereid pre-proto builds, the memory straps used
don't match those generated by spd_tools. Each pre-proto build only
supports a single memory part, and each of these parts should have ID 0
(see CB:61443). Therefore, for nivviks and nereid board ID 0, hard code
the memory IDs to 0 instead of reading them from the memory strap pins.
From P1 onwards, the memory straps will be assigned based on the IDs
generated by spd_tools.
BUG=b:197479026
TEST=Build test nivviks and nereid
Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Ic0c6f3f22d7a94f9eed44e736308e5ac4157163d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61496
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src')
4 files changed, 64 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/nereid/Makefile.inc b/src/mainboard/google/brya/variants/nereid/Makefile.inc index 58c4d79e02..defb592f2f 100644 --- a/src/mainboard/google/brya/variants/nereid/Makefile.inc +++ b/src/mainboard/google/brya/variants/nereid/Makefile.inc @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only bootblock-y += gpio.c + romstage-y += gpio.c +romstage-y += memory.c + ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/nereid/memory.c b/src/mainboard/google/brya/variants/nereid/memory.c new file mode 100644 index 0000000000..0453cf1748 --- /dev/null +++ b/src/mainboard/google/brya/variants/nereid/memory.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> + +int variant_memory_sku(void) +{ + /* + * The memory straps in the P0 build don't match those generated by + * spd_tools, so override the memory ID to 0. + */ + if (board_id() == 0) + return 0; + + /* + * Memory configuration board straps + * GPIO_MEM_CONFIG_0 GPP_E1 + * GPIO_MEM_CONFIG_1 GPP_E2 + * GPIO_MEM_CONFIG_2 GPP_E3 + */ + gpio_t spd_gpios[] = { + GPP_E1, + GPP_E2, + GPP_E3, + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} diff --git a/src/mainboard/google/brya/variants/nivviks/Makefile.inc b/src/mainboard/google/brya/variants/nivviks/Makefile.inc index 58c4d79e02..defb592f2f 100644 --- a/src/mainboard/google/brya/variants/nivviks/Makefile.inc +++ b/src/mainboard/google/brya/variants/nivviks/Makefile.inc @@ -1,4 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only bootblock-y += gpio.c + romstage-y += gpio.c +romstage-y += memory.c + ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/nivviks/memory.c b/src/mainboard/google/brya/variants/nivviks/memory.c new file mode 100644 index 0000000000..0453cf1748 --- /dev/null +++ b/src/mainboard/google/brya/variants/nivviks/memory.c @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> + +int variant_memory_sku(void) +{ + /* + * The memory straps in the P0 build don't match those generated by + * spd_tools, so override the memory ID to 0. + */ + if (board_id() == 0) + return 0; + + /* + * Memory configuration board straps + * GPIO_MEM_CONFIG_0 GPP_E1 + * GPIO_MEM_CONFIG_1 GPP_E2 + * GPIO_MEM_CONFIG_2 GPP_E3 + */ + gpio_t spd_gpios[] = { + GPP_E1, + GPP_E2, + GPP_E3, + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} |