diff options
| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-01-10 17:12:01 +0530 |
|---|---|---|
| committer | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-01-12 05:44:24 +0000 |
| commit | 0ae7a8b765f27f1df2330334ed25bc41732f9ea1 (patch) | |
| tree | 685763fe8909c16f6335989c4e3a84705c72a32e /src | |
| parent | 3ca84779015a733aa27b55ad176bbe6b23aaad38 (diff) | |
soc/intel/common: Use enum csme_failure_reason
The patch updates return type for below functions as they uses
'enum csme_failure_reason' type return values.
1. cse_sub_part_trigger_update()
2. handle_cse_sub_part_fw_update_rv()
3. cse_sub_part_fw_update()
TEST=Build coreboot code for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I43bc2d518a275894860e4d3c930c3c4d9685fb3a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71792
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse_lite.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 11a4624c26..6e9a09e7b6 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -952,8 +952,8 @@ static bool cse_prep_for_component_update(const struct cse_bp_info *cse_bp_info) return cse_hmrfpo_enable(); } -static uint8_t cse_sub_part_trigger_update(enum bpdt_entry_type type, uint8_t bp, - const void *subpart_cbfs_rw, const size_t blob_sz, +static enum csme_failure_reason cse_sub_part_trigger_update(enum bpdt_entry_type type, + uint8_t bp, const void *subpart_cbfs_rw, const size_t blob_sz, struct region_device *target_rdev) { if (region_device_sz(target_rdev) < blob_sz) { @@ -977,7 +977,7 @@ static uint8_t cse_sub_part_trigger_update(enum bpdt_entry_type type, uint8_t bp return CSE_LITE_SKU_PART_UPDATE_SUCCESS; } -static uint8_t handle_cse_sub_part_fw_update_rv(uint8_t rv) +static enum csme_failure_reason handle_cse_sub_part_fw_update_rv(enum csme_failure_reason rv) { switch (rv) { case CSE_LITE_SKU_PART_UPDATE_SUCCESS: @@ -1052,14 +1052,14 @@ error_exit: return rv; } -static uint8_t cse_sub_part_fw_update(const struct cse_bp_info *cse_bp_info) +static enum csme_failure_reason cse_sub_part_fw_update(const struct cse_bp_info *cse_bp_info) { if (skip_cse_sub_part_update()) { printk(BIOS_INFO, "CSE Sub-partition update not required\n"); return CSE_LITE_SKU_SUB_PART_UPDATE_NOT_REQ; } - int rv; + enum csme_failure_reason rv; rv = cse_sub_part_fw_component_update(IOM_FW, cse_bp_info, CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME); |