qualcomm/common: Pass FMAX_LIMIT flag for Lazor board to QcLib

This patch passes a hint flag to QcLib on Lazor boards to tell it to
limit the DDR frequency for certain memory parts (8GB Hynix) to work
around a board-specific stability issue.

BRANCH=trogdor
BUG=b:267387867
TEST=Validated on qualcomm sc7180 development board

Change-Id: I45915cf93d2a57ff0c9710f2ac36dfb665eff1c6
Signed-off-by: Sudheer Kumar Amrabadi <samrabad@codeaurora.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>

3 files changed, 20 insertions, 9 deletions

diff --git a/src/soc/qualcomm/common/include/soc/qclib_common.h b/src/soc/qualcomm/common/include/soc/qclib_common.h
index 19966e27a3..792b743f40 100644
--- a/src/soc/qualcomm/common/include/soc/qclib_common.h
+++ b/src/soc/qualcomm/common/include/soc/qclib_common.h
@@ -45,6 +45,7 @@ struct qclib_cb_if_table_entry {
 /* GA_BMASK_VALUES (global_attributes bit mask values) */
 #define QCLIB_GA_ENABLE_UART_LOGGING   0x00000001
 #define QCLIB_GA_FORCE_COLD_REBOOT BIT(3)
+#define QCLIB_GA_DDR_FMAX_LIMIT_HYNIX8GB BIT(5)
 
 #define QCLIB_INTERFACE_VERSION 0x00000001
 #define QCLIB_MAX_NUMBER_OF_ENTRIES 16
@@ -67,7 +68,7 @@ extern struct qclib_cb_if_table qclib_cb_if_table;
 void qclib_add_if_table_entry(const char *name, void *base,
 			      uint32_t size, uint32_t attrs);
 void qclib_load_and_run(void);
-int  qclib_soc_blob_load(void);
+int  qclib_soc_override(struct qclib_cb_if_table *table);
 
 const char *qclib_file_default(enum qclib_cbfs_file file);
 const char *qclib_file(enum qclib_cbfs_file file);
diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c
index 2769dede2f..d177688922 100644
--- a/src/soc/qualcomm/common/qclib.c
+++ b/src/soc/qualcomm/common/qclib.c
@@ -169,7 +169,7 @@ static void dump_te_table(void)
 	}
 }
 
-__weak int qclib_soc_blob_load(void) { return 0; }
+__weak int qclib_soc_override(struct qclib_cb_if_table *table) { return 0; }
 
 void qclib_load_and_run(void)
 {
@@ -220,12 +220,6 @@ void qclib_load_and_run(void)
 	}
 	qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, data_size, 0);
 
-	/* hook for SoC specific binary blob loads */
-	if (qclib_soc_blob_load()) {
-		printk(BIOS_ERR, "qclib_soc_blob_load failed\n");
-		goto fail;
-	}
-
 	/* Enable QCLib serial output, based on Kconfig */
 	if (CONFIG(CONSOLE_SERIAL))
 		qclib_cb_if_table.global_attributes =
@@ -246,6 +240,12 @@ void qclib_load_and_run(void)
 		printk(BIOS_INFO, "qcsdi.entry[%p]\n", qcsdi.entry);
 	}
 
+	/* hook for SoC specific binary blob loads */
+	if (qclib_soc_override(&qclib_cb_if_table)) {
+		printk(BIOS_ERR, "qclib_soc_override failed\n");
+		goto fail;
+	}
+
 	dump_te_table();
 
 	/* Attempt to load QCLib elf */
@@ -258,7 +258,7 @@ void qclib_load_and_run(void)
 	prog_set_entry(&qclib, prog_entry(&qclib), &qclib_cb_if_table);
 
 	printk(BIOS_DEBUG, "\n\n\nQCLib is about to Initialize DDR\n");
-	printk(BIOS_DEBUG, "Global Attributes[%x]..Table Entries Count[%d]\n",
+	printk(BIOS_DEBUG, "Global Attributes[%#x]..Table Entries Count[%d]\n",
 		qclib_cb_if_table.global_attributes,
 		qclib_cb_if_table.num_entries);
 	printk(BIOS_DEBUG, "Jumping to QCLib code at %p(%p)\n",
diff --git a/src/soc/qualcomm/sc7180/qclib.c b/src/soc/qualcomm/sc7180/qclib.c
index e05a24f029..b9f5d370a3 100644
--- a/src/soc/qualcomm/sc7180/qclib.c
+++ b/src/soc/qualcomm/sc7180/qclib.c
@@ -24,3 +24,13 @@ const char *qclib_file(enum qclib_cbfs_file file)
 		return qclib_file_default(file);
 	}
 }
+
+int qclib_soc_override(struct qclib_cb_if_table *table)
+{
+	/* Lazor boards need a hack to limit DDR frequency on certain memory parts to work
+	   around a stability issue. */
+	if (CONFIG(BOARD_GOOGLE_LAZOR))
+		table->global_attributes |= QCLIB_GA_DDR_FMAX_LIMIT_HYNIX8GB;
+
+	return 0;
+}