diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-12-02 11:31:06 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-03 15:52:09 +0000 |
| commit | 012dc590b3980aa1f1a1a7ac1bbeb3cdbec06cfd (patch) | |
| tree | 239795e4f852aaf3ffd4c8d1c167b0d9d896505e /src | |
| parent | 84b9191831f7f89978cf5630cdf7119e6414306e (diff) | |
mb/prodrive/hermes: Correct memory RCOMP settings
The original RCOMP resistor and target values only apply to ULT CPUs and
do not make sense for the CFL-S CPUs Hermes uses. Fix the RCOMP settings
and the associated comments.
Tested, still boots.
Change-Id: I015797c58c914c6581d472e6d70d2dd7bad2b14f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/prodrive/hermes/romstage.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/prodrive/hermes/romstage.c b/src/mainboard/prodrive/hermes/romstage.c index 513bab38b8..b52c52c489 100644 --- a/src/mainboard/prodrive/hermes/romstage.c +++ b/src/mainboard/prodrive/hermes/romstage.c @@ -24,11 +24,11 @@ static const struct cnl_mb_cfg baseboard_mem_cfg = { .spd_spec = {.spd_smbus_address = 0xa6} }, - /* Baseboard uses 121, 81 and 100 rcomp resistors */ - .rcomp_resistor = {121, 81, 100}, + /* Rcomp resistors on CFL-S are located on the CPU itself */ + .rcomp_resistor = {121, 75, 100}, - /* Baseboard Rcomp target values. */ - .rcomp_targets = {100, 40, 20, 20, 26}, + /* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */ + .rcomp_targets = {60, 26, 20, 20, 26}, /* Baseboard is an interleaved design */ .dq_pins_interleaved = 1, |