soc/intel/alderlake: Update mainboard_memory_init_params() argument

This patch updates mainboard_memory_init_params() function argument from
FSPM_UPD to FSP_M_CONFIG. Ideally mainboard_memory_init_params()
function don't need to override anything other than FSP_M_CONFIG UPDs
hence passing config block alone rather passing entire FSP-M UPD
structure.

Change-Id: I238870478a1427918abf888d71ba9c9fa80d3427
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

5 files changed, 10 insertions, 10 deletions

diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c
index 475bf61148..dc44c0d309 100644
--- a/src/mainboard/google/brya/romstage.c
+++ b/src/mainboard/google/brya/romstage.c
@@ -6,7 +6,7 @@
 #include <gpio.h>
 #include <soc/romstage.h>
 
-void mainboard_memory_init_params(FSPM_UPD *memupd)
+void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
 {
 	const struct mb_cfg *mem_config = variant_memory_params();
 	bool half_populated = variant_is_half_populated();
@@ -16,5 +16,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 		.cbfs_index = variant_memory_sku(),
 	};
 
-	memcfg_init(&memupd->FspmConfig, mem_config, &spd_info, half_populated);
+	memcfg_init(m_cfg, mem_config, &spd_info, half_populated);
 }
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
index 9fff25723e..cccd258595 100644
--- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c
@@ -24,7 +24,7 @@ static size_t get_spd_index(void)
 	return spd_index;
 }
 
-void mainboard_memory_init_params(FSPM_UPD *mupd)
+void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
 {
 	const struct mb_cfg *mem_config = variant_memory_params();
 	int board_id = get_board_id();
@@ -54,7 +54,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	case ADL_P_DDR4_2:
 	case ADL_P_DDR5_1:
 	case ADL_P_DDR5_2:
-		memcfg_init(&mupd->FspmConfig, mem_config, &ddr4_ddr5_spd_info, half_populated);
+		memcfg_init(m_cfg, mem_config, &ddr4_ddr5_spd_info, half_populated);
 		break;
 	case ADL_P_LP4_1:
 	case ADL_P_LP4_2:
@@ -62,7 +62,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	case ADL_P_LP5_2:
 	case ADL_M_LP4:
 	case ADL_M_LP5:
-		memcfg_init(&mupd->FspmConfig, mem_config, &lp4_lp5_spd_info, half_populated);
+		memcfg_init(m_cfg, mem_config, &lp4_lp5_spd_info, half_populated);
 		break;
 	default:
 		die("Unknown board id = 0x%x\n", board_id);
diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c
index 1e29e8029d..3aacf38a03 100644
--- a/src/mainboard/intel/shadowmountain/romstage.c
+++ b/src/mainboard/intel/shadowmountain/romstage.c
@@ -9,7 +9,7 @@
 #include <baseboard/variants.h>
 #include <cbfs.h>
 
-void mainboard_memory_init_params(FSPM_UPD *mupd)
+void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
 {
 	const struct mb_cfg *mem_config = variant_memory_params();
 	const bool half_populated = false;
@@ -19,5 +19,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 		.cbfs_index = variant_memory_sku(),
 	};
 
-	memcfg_init(&mupd->FspmConfig, mem_config, &lp5_spd_info, half_populated);
+	memcfg_init(m_cfg, mem_config, &lp5_spd_info, half_populated);
 }
diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h
index 13a5b5f9ca..4d498be192 100644
--- a/src/soc/intel/alderlake/include/soc/romstage.h
+++ b/src/soc/intel/alderlake/include/soc/romstage.h
@@ -6,7 +6,7 @@
 #include <fsp/api.h>
 #include <stddef.h>
 
-void mainboard_memory_init_params(FSPM_UPD *mupd);
+void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg);
 void systemagent_early_init(void);
 
 /* Board type */
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index c0f8e34f8a..f9b3d6022d 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -345,10 +345,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 	config = config_of_soc();
 
 	soc_memory_init_params(m_cfg, config);
-	mainboard_memory_init_params(mupd);
+	mainboard_memory_init_params(m_cfg);
 }
 
-__weak void mainboard_memory_init_params(FSPM_UPD *mupd)
+__weak void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg)
 {
 	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
 }