nb/amdk8/(pre_)f.h: Don't declare global variable in header

This is needed if one wants to use the header more than once.

Change-Id: I375d08465b6c64cd91e7563e3917764507d779ba
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19029
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

24 files changed, 27 insertions, 3 deletions

diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c
index 26275b6ee5..89456404bd 100644
--- a/src/mainboard/amd/dbm690t/romstage.c
+++ b/src/mainboard/amd/dbm690t/romstage.c
@@ -34,6 +34,7 @@
 #include "southbridge/amd/rs690/early_setup.c"
 #include "southbridge/amd/sb600/early_setup.c"
 #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
 
diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c
index bbbe869e35..55771f9b1e 100644
--- a/src/mainboard/amd/mahogany/romstage.c
+++ b/src/mainboard/amd/mahogany/romstage.c
@@ -34,6 +34,7 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sb700/smbus.h>
 #include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */
+#include <northbridge/amd/amdk8/f.h>
 
 unsigned get_sbdn(unsigned bus);
 
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index 549ad0ceac..a8242ec837 100644
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -32,6 +32,7 @@
 #include "southbridge/amd/rs690/early_setup.c"
 #include "southbridge/amd/sb600/early_setup.c"
 #include "northbridge/amd/amdk8/debug.c" /* After sb600/early_setup.c! */
+#include <northbridge/amd/amdk8/f.h>
 
 static void memreset(int controllers, const struct mem_controller *ctrl) { }
 static void activate_spd_rom(const struct mem_controller *ctrl) { }
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
index ae89b05015..5e0123b5b4 100644
--- a/src/mainboard/amd/serengeti_cheetah/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah/romstage.c
@@ -31,6 +31,7 @@
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627hf/w83627hf.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 3645c9f242..0894af9e53 100644
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -35,6 +35,7 @@
 #include <southbridge/amd/sb700/sb700.h>
 #include <southbridge/amd/sb700/smbus.h>
 #include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
 #define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V)
diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c
index 4965c4fb3b..d10fe9aaac 100644
--- a/src/mainboard/asus/a8n_e/romstage.c
+++ b/src/mainboard/asus/a8n_e/romstage.c
@@ -44,6 +44,7 @@
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 static void memreset(int controllers, const struct mem_controller *ctrl) { }
 static void activate_spd_rom(const struct mem_controller *ctrl) { }
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index b8f631b3ca..4f942b5cc9 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -42,6 +42,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 4c74d0f91b..2530aee96e 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -42,6 +42,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index 0f9806236f..2f7c3df310 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -42,6 +42,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
index 03a095d054..d7bebbb702 100644
--- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
@@ -40,6 +40,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627thg/w83627thg.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index daf0b501ef..2efcb6c33a 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -41,6 +41,7 @@ unsigned int get_sbdn(unsigned bus);
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c
index 158e612519..a67ae46066 100644
--- a/src/mainboard/broadcom/blast/romstage.c
+++ b/src/mainboard/broadcom/blast/romstage.c
@@ -17,6 +17,7 @@
 #include <superio/nsc/pc87417/pc87417.h>
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, PC87417_SP1)
 #define RTC_DEV PNP_DEV(0x2e, PC87417_RTC)
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c
index 4ec6a8718c..46831322e8 100644
--- a/src/mainboard/hp/dl145_g1/romstage.c
+++ b/src/mainboard/hp/dl145_g1/romstage.c
@@ -20,6 +20,7 @@
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627hf/w83627hf.h>
 #include <cpu/x86/bist.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 9fbc80839c..a31ecefbaa 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -16,6 +16,7 @@
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627hf/w83627hf.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index d25799f83f..8a01e6b317 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -36,6 +36,7 @@
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include "southbridge/amd/rs690/early_setup.c"
 #include "southbridge/amd/sb600/early_setup.c"
+#include <northbridge/amd/amdk8/f.h>
 
 static void memreset(int controllers, const struct mem_controller *ctrl) { }
 static void activate_spd_rom(const struct mem_controller *ctrl) { }
diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c
index 620bc649d1..25c4a403ef 100644
--- a/src/mainboard/msi/ms7135/romstage.c
+++ b/src/mainboard/msi/ms7135/romstage.c
@@ -41,6 +41,7 @@
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "cpu/amd/dualcore/dualcore.c"
 #include <spd.h>
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #if CONFIG_HAVE_OPTION_TABLE
 #include "option_table.h"
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index a7f2c965d4..15ba45f1b1 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -41,6 +41,7 @@
 #include "southbridge/amd/rs690/early_setup.c"
 #include "southbridge/amd/sb600/early_setup.c"
 #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, CONFIG_UART_FOR_CONSOLE == 1 ? IT8712F_SP2 : IT8712F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c
index 397acfec13..a1659b7f84 100644
--- a/src/mainboard/sunw/ultra40/romstage.c
+++ b/src/mainboard/sunw/ultra40/romstage.c
@@ -20,6 +20,7 @@
 #include <cpu/x86/bist.h>
 #include "superio/smsc/lpc47b397/early_gpio.c"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B397_SP1)
 #define SUPERIO_GPIO_DEV PNP_DEV(0x2e, LPC47B397_RT)
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index b1805a9d8f..d5a4784ced 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -34,6 +34,7 @@
 #include "northbridge/amd/amdk8/setup_resource_map.c"
 #include "southbridge/amd/rs690/early_setup.c"
 #include "southbridge/amd/sb600/early_setup.c"
+#include <northbridge/amd/amdk8/f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO)
diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c
index 3372f3292c..2fe96a7f8c 100644
--- a/src/mainboard/winent/mb6047/romstage.c
+++ b/src/mainboard/winent/mb6047/romstage.c
@@ -20,6 +20,7 @@
 #include <superio/winbond/w83627thg/w83627thg.h>
 #include <cpu/x86/bist.h>
 #include "northbridge/amd/amdk8/setup_resource_map.c"
+#include <northbridge/amd/amdk8/pre_f.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
diff --git a/src/northbridge/amd/amdk8/f.h b/src/northbridge/amd/amdk8/f.h
index 359a1d6283..db79fbf8d0 100644
--- a/src/northbridge/amd/amdk8/f.h
+++ b/src/northbridge/amd/amdk8/f.h
@@ -520,7 +520,7 @@ struct sys_info {
 
 #ifdef __PRE_RAM__
 #include <arch/early_variables.h>
-struct sys_info sysinfo_car CAR_GLOBAL;
+extern struct sys_info sysinfo_car;
 #endif
 
 #include <reset.h>
diff --git a/src/northbridge/amd/amdk8/pre_f.h b/src/northbridge/amd/amdk8/pre_f.h
index 9c1eeb685c..abc51b111f 100644
--- a/src/northbridge/amd/amdk8/pre_f.h
+++ b/src/northbridge/amd/amdk8/pre_f.h
@@ -264,7 +264,7 @@ struct sys_info {
 
 #ifdef __PRE_RAM__
 #include <arch/early_variables.h>
-struct sys_info sysinfo_car CAR_GLOBAL;
+extern struct sys_info sysinfo_car;
 #endif
 
 #endif /* AMDK8_PRE_F_H */
diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c
index 9f333fdaa9..48e2bb93bd 100644
--- a/src/northbridge/amd/amdk8/raminit.c
+++ b/src/northbridge/amd/amdk8/raminit.c
@@ -17,6 +17,9 @@
 #include "option_table.h"
 #endif
 
+#include <arch/early_variables.h>
+struct sys_info sysinfo_car CAR_GLOBAL;
+
 void setup_resource_map(const unsigned int *register_values, int max)
 {
 	int i;
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index aa2349d39b..e7a14ec454 100644
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -37,10 +37,11 @@
 #define printk_raminit(args...)
 #endif
 
+#include <arch/early_variables.h>
+struct sys_info sysinfo_car CAR_GLOBAL;
 
 #include "f_pci.c"
 
-
 	/* for PCI_ADDR(0, 0x18, 2, 0x98) index,
 	 and PCI_ADDR(0x, 0x18, 2, 0x9c) data */
 	/*