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authorRonald G. Minnich <rminnich@gmail.com>2006-04-18 21:34:32 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-04-18 21:34:32 +0000
commit61083dad0f03af10192ab65ebb0a2af98b9af8a4 (patch)
tree6ec508d3253a8e575248b573cba08dfdbe675500 /src
parent55e10fe3a4e84ef19ad718345808b6c354893ff1 (diff)
add back in missing line
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/olpc/rev_a/auto.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/mainboard/olpc/rev_a/auto.c b/src/mainboard/olpc/rev_a/auto.c
index ea86d34497..17ded0dc97 100644
--- a/src/mainboard/olpc/rev_a/auto.c
+++ b/src/mainboard/olpc/rev_a/auto.c
@@ -94,6 +94,9 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
print_debug_hex32(msr.hi);
print_debug("\r\n");
+
+ /* this is a standard value, DOES NOT PROBABLY MATCH FROM ABOVE */
+ /* well, it may be close. It's about 200,000 ticks */
msr.lo = 0x00003000;
wrmsr(MC_CF07_DATA, msr);
@@ -103,16 +106,17 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
/* per standard bios settings */
+ msr.hi = 0x18000108;
msr.lo =
- (6<<28) | // cas_lat
- (10<<24)| // ref2act
- (7<<20)| // act2pre
- (3<<16)| // pre2act
- (3<<12)| // act2cmd
+ (6<<28) | // cas_lat
+ (10<<24)| // ref2act
+ (7<<20)| // act2pre
+ (3<<16)| // pre2act
+ (3<<12)| // act2cmd
(2<<8)| // act2act
(2<<6)| // dplwr
(2<<4)| // dplrd
- (3); // dal
+ (3); // dal
wrmsr(0x20000019, msr);