diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-08-13 09:05:22 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-19 14:04:08 +0000 |
| commit | 416bf45480153e7a7d367d7b5da093786f4a433f (patch) | |
| tree | f78c553224302e3be312afd85f5139296c419a6c /src | |
| parent | a537f9a2ecfd2753f06a5707af965658e21dd7e1 (diff) | |
skylake: correct IO-APIC redirection entry count
The skylake IO-APIC supports up to 120 redirection entries.
In practice it seems FSP has already written to this write-once
register. However, it doesn't hurt to actually be correct within
the source.
BUG=chrome-os-partner:43522
BRANCH=None
TEST=Built and booted glados.
Original-Change-Id: I666b1b6034f0d37a37ea918f802317f9d5f15718
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/293251
Original-Reviewed-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: I6ddbc89c98c262e2dd0f9f0b76adb092d3043602
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11235
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/lpc.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index 64dfa22a9c..861b5ba76b 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -54,15 +54,16 @@ static void pch_enable_ioapic(struct device *dev) { u32 reg32; + /* PCH-LP has 120 redirection entries */ + const int redir_entries = 120; set_ioapic_id((void *)IO_APIC_ADDR, 0x02); /* affirm full set of redirection table entries ("write once") */ reg32 = io_apic_read((void *)IO_APIC_ADDR, 0x01); - /* PCH-LP has 39 redirection entries */ reg32 &= ~0x00ff0000; - reg32 |= 0x00270000; + reg32 |= (redir_entries - 1) << 16; io_apic_write((void *)IO_APIC_ADDR, 0x01, reg32); |