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authorAaron Durbin <adurbin@chromium.org>2013-11-20 15:18:24 -0600
committerAaron Durbin <adurbin@google.com>2014-01-30 05:36:33 +0100
commit2f6402c7a66acb7fd51794b190fbecfb852bcab4 (patch)
tree7812e196b42ac143beb56e09d13cef4f530bb364 /src
parent58867b10028e97a323498d0be284243f769e7845 (diff)
chromeec: allow override of i8042 interrupt
Some boards need to override which IRQ the i8042 keyboard controller has its interrupt on instead of the default IRQ#1. The SIO_EC_PS2K_IRQ macro provides the mainboard an ability to override the interrupt location. BUG=chrome-os-partner:23965 BRANCH=None TEST=Built and booted rambi using this option. New IRQ is correctly picked up by kernel allowing keyboard support. Change-Id: Ic2b222018dfc3aa30e24a31009e832ae0fb7e9cf Reviewed-on: https://chromium-review.googlesource.com/177222 Tested-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4978 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r--src/ec/google/chromeec/acpi/superio.asl8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/acpi/superio.asl b/src/ec/google/chromeec/acpi/superio.asl
index 59401812e7..a02286405c 100644
--- a/src/ec/google/chromeec/acpi/superio.asl
+++ b/src/ec/google/chromeec/acpi/superio.asl
@@ -152,7 +152,11 @@ Device (SIO) {
{
IO (Decode16, 0x60, 0x60, 0x01, 0x01)
IO (Decode16, 0x64, 0x64, 0x01, 0x01)
+#ifdef SIO_EC_PS2K_IRQ
+ SIO_EC_PS2K_IRQ
+#else
IRQNoFlags () {1}
+#endif
})
Name (_PRS, ResourceTemplate()
@@ -160,7 +164,11 @@ Device (SIO) {
StartDependentFn (0, 0) {
IO (Decode16, 0x60, 0x60, 0x01, 0x01)
IO (Decode16, 0x64, 0x64, 0x01, 0x01)
+#ifdef SIO_EC_PS2K_IRQ
+ SIO_EC_PS2K_IRQ
+#else
IRQNoFlags () {1}
+#endif
}
EndDependentFn ()
})