diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-10-30 16:48:19 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-01 11:50:03 +0000 |
| commit | 2715cdb3f32fcebdd1de6870a665a2b613c07e60 (patch) | |
| tree | 5addc7091dfc055927c7edbbb44f36a45114e77c /src | |
| parent | 1e8f305957c98cb224574e1fa81938c9a692bd48 (diff) | |
soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi
This patch creates a common instance of sleepstates.asl inside intel common
code (southbridge/intel/common/acpi) and asks all IA CPU/SOC code to
refer sleepstates.asl from common code block.
TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify
S0/S3/S4/S5 entries after booting to OS.
Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36463
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
133 files changed, 120 insertions, 424 deletions
diff --git a/src/mainboard/adi/rcc-dff/dsdt.asl b/src/mainboard/adi/rcc-dff/dsdt.asl index 310ad04741..e5cd0ea1a1 100644 --- a/src/mainboard/adi/rcc-dff/dsdt.asl +++ b/src/mainboard/adi/rcc-dff/dsdt.asl @@ -49,5 +49,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl index 830c0c8741..40af217c47 100644 --- a/src/mainboard/apple/macbook21/dsdt.asl +++ b/src/mainboard/apple/macbook21/dsdt.asl @@ -46,5 +46,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/apple/macbookair4_2/dsdt.asl b/src/mainboard/apple/macbookair4_2/dsdt.asl index 65ce63ea6e..641b951bb5 100644 --- a/src/mainboard/apple/macbookair4_2/dsdt.asl +++ b/src/mainboard/apple/macbookair4_2/dsdt.asl @@ -30,7 +30,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/asrock/b75pro3-m/dsdt.asl b/src/mainboard/asrock/b75pro3-m/dsdt.asl index 467a001dac..00256267f7 100644 --- a/src/mainboard/asrock/b75pro3-m/dsdt.asl +++ b/src/mainboard/asrock/b75pro3-m/dsdt.asl @@ -33,7 +33,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl index f3e216d4c1..0b3baf6153 100644 --- a/src/mainboard/asrock/h110m/dsdt.asl +++ b/src/mainboard/asrock/h110m/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/asrock/h81m-hds/dsdt.asl b/src/mainboard/asrock/h81m-hds/dsdt.asl index f76c393bb0..67088fd347 100644 --- a/src/mainboard/asrock/h81m-hds/dsdt.asl +++ b/src/mainboard/asrock/h81m-hds/dsdt.asl @@ -27,7 +27,7 @@ DefinitionBlock( #include "acpi/platform.asl" #include <southbridge/intel/lynxpoint/acpi/platform.asl> #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include <cpu/intel/common/acpi/cpu.asl> Scope (\_SB) diff --git a/src/mainboard/asus/h61m-cs/dsdt.asl b/src/mainboard/asus/h61m-cs/dsdt.asl index 8452191676..0e1cc3abcf 100644 --- a/src/mainboard/asus/h61m-cs/dsdt.asl +++ b/src/mainboard/asus/h61m-cs/dsdt.asl @@ -30,7 +30,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Device (\_SB.PCI0) { #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> diff --git a/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl b/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl index e3abc26303..c5f92e27f8 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl +++ b/src/mainboard/asus/maximus_iv_gene-z/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock( #include <cpu/intel/common/acpi/cpu.asl> #include <southbridge/intel/bd82x6x/acpi/platform.asl> #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 7b6bdf81a7..66f0efe49d 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl index 5ec7c19be7..cc9efbb445 100644 --- a/src/mainboard/asus/p5qc/dsdt.asl +++ b/src/mainboard/asus/p5qc/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801jx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/asus/p5qpl-am/dsdt.asl +++ b/src/mainboard/asus/p5qpl-am/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p8h61-m_lx/dsdt.asl b/src/mainboard/asus/p8h61-m_lx/dsdt.asl index e3abc26303..c5f92e27f8 100644 --- a/src/mainboard/asus/p8h61-m_lx/dsdt.asl +++ b/src/mainboard/asus/p8h61-m_lx/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock( #include <cpu/intel/common/acpi/cpu.asl> #include <southbridge/intel/bd82x6x/acpi/platform.asl> #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { diff --git a/src/mainboard/asus/p8h61-m_pro/dsdt.asl b/src/mainboard/asus/p8h61-m_pro/dsdt.asl index d9861ef607..4b48e1fd53 100644 --- a/src/mainboard/asus/p8h61-m_pro/dsdt.asl +++ b/src/mainboard/asus/p8h61-m_pro/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/asus/p8z77-m_pro/dsdt.asl b/src/mainboard/asus/p8z77-m_pro/dsdt.asl index 89ad30c997..1c7a620ee2 100644 --- a/src/mainboard/asus/p8z77-m_pro/dsdt.asl +++ b/src/mainboard/asus/p8z77-m_pro/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Device (\_SB.PCI0) { diff --git a/src/mainboard/compulab/intense_pc/dsdt.asl b/src/mainboard/compulab/intense_pc/dsdt.asl index ad0940c275..97df937f00 100644 --- a/src/mainboard/compulab/intense_pc/dsdt.asl +++ b/src/mainboard/compulab/intense_pc/dsdt.asl @@ -33,7 +33,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/esd/atom15/dsdt.asl b/src/mainboard/esd/atom15/dsdt.asl index 3719154bdd..bea6af7973 100644 --- a/src/mainboard/esd/atom15/dsdt.asl +++ b/src/mainboard/esd/atom15/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/fsp_baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index 8dc11942a0..dc1dacc66b 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl index 4471ef2dbd..4e75968f91 100644 --- a/src/mainboard/getac/p470/dsdt.asl +++ b/src/mainboard/getac/p470/dsdt.asl @@ -55,5 +55,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index 95ed8d913d..afc53861bb 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl index c00ee30e6b..387fd32958 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl +++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl @@ -30,7 +30,7 @@ DefinitionBlock( #include <cpu/intel/common/acpi/cpu.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl index dbf8c96f51..7ee12a08ee 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl @@ -35,7 +35,7 @@ DefinitionBlock( /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Device (\_SB.PCI0) { diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index 7a2aad9a4b..9a5dcc7826 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -51,7 +51,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <soc/intel/broadwell/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl index 41f908fcf7..7b369d8fd7 100644 --- a/src/mainboard/google/beltino/dsdt.asl +++ b/src/mainboard/google/beltino/dsdt.asl @@ -53,5 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index dd18e95ae6..c71535c9a1 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -54,5 +54,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl index 3afdaaab55..7aa62f8fb4 100644 --- a/src/mainboard/google/cyan/dsdt.asl +++ b/src/mainboard/google/cyan/dsdt.asl @@ -62,7 +62,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl index ab0b977c87..d5c709ec1d 100644 --- a/src/mainboard/google/dragonegg/dsdt.asl +++ b/src/mainboard/google/dragonegg/dsdt.asl @@ -49,7 +49,7 @@ DefinitionBlock( #endif // Chipset specific sleep states - #include <soc/intel/icelake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 2568800f91..91d3704276 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -54,7 +54,7 @@ DefinitionBlock( #endif /* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Low power idle table */ #include <soc/intel/cannonlake/acpi/lpit.asl> diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index a705457826..3e9d570705 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 03df2b9c8b..44d544c378 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index af5f99d815..6dab56ea77 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -49,7 +49,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl index e2959a788a..9329b58a79 100644 --- a/src/mainboard/google/hatch/dsdt.asl +++ b/src/mainboard/google/hatch/dsdt.asl @@ -52,10 +52,10 @@ DefinitionBlock( #endif /* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> - /* Low power idle table */ - #include <soc/intel/cannonlake/acpi/lpit.asl> + /* Low power idle table */ + #include <soc/intel/cannonlake/acpi/lpit.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index e216b132a9..add675d218 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -51,7 +51,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <soc/intel/broadwell/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index ce4ba9195b..e380f3e1e7 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -55,5 +55,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl index b43494821a..2b6c33f667 100644 --- a/src/mainboard/google/octopus/dsdt.asl +++ b/src/mainboard/google/octopus/dsdt.asl @@ -45,7 +45,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index e866e21169..1f72a6d5d0 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -55,5 +55,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index 34862df3cb..7e0eb9ae08 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -55,7 +55,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index 8ca9dfb592..2393830d13 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl index 2b2f522661..29b816586c 100644 --- a/src/mainboard/google/reef/dsdt.asl +++ b/src/mainboard/google/reef/dsdt.asl @@ -45,7 +45,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 58e0704deb..743a2f0a56 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -54,7 +54,7 @@ DefinitionBlock( #endif /* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Low power idle table */ #include <soc/intel/cannonlake/acpi/lpit.asl> diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 8424c258ae..6c45ea95aa 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -64,5 +64,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index 1361a516de..43d0fff948 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -55,5 +55,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/hp/2570p/dsdt.asl b/src/mainboard/hp/2570p/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/2570p/dsdt.asl +++ b/src/mainboard/hp/2570p/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/2760p/dsdt.asl b/src/mainboard/hp/2760p/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/2760p/dsdt.asl +++ b/src/mainboard/hp/2760p/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/8460p/dsdt.asl b/src/mainboard/hp/8460p/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/8460p/dsdt.asl +++ b/src/mainboard/hp/8460p/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/8470p/dsdt.asl b/src/mainboard/hp/8470p/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/8470p/dsdt.asl +++ b/src/mainboard/hp/8470p/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/8770w/dsdt.asl b/src/mainboard/hp/8770w/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/8770w/dsdt.asl +++ b/src/mainboard/hp/8770w/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl b/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl index ef67ee7477..c3453b0d40 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl +++ b/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/folio_9470m/dsdt.asl b/src/mainboard/hp/folio_9470m/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/folio_9470m/dsdt.asl +++ b/src/mainboard/hp/folio_9470m/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/revolve_810_g1/dsdt.asl b/src/mainboard/hp/revolve_810_g1/dsdt.asl index 756516efe2..7a171aea58 100644 --- a/src/mainboard/hp/revolve_810_g1/dsdt.asl +++ b/src/mainboard/hp/revolve_810_g1/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/hp/z220_sff_workstation/dsdt.asl b/src/mainboard/hp/z220_sff_workstation/dsdt.asl index ef67ee7477..c3453b0d40 100644 --- a/src/mainboard/hp/z220_sff_workstation/dsdt.asl +++ b/src/mainboard/hp/z220_sff_workstation/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index cc56d89aa5..31b67a73d5 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -47,5 +47,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 2e3fa7ac44..9dd8879706 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -33,6 +33,6 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index c713330f38..28d743e598 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/bayleybay_fsp/dsdt.asl b/src/mainboard/intel/bayleybay_fsp/dsdt.asl index 3719154bdd..bea6af7973 100644 --- a/src/mainboard/intel/bayleybay_fsp/dsdt.asl +++ b/src/mainboard/intel/bayleybay_fsp/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/fsp_baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index c719d2388f..acc4c7c7c3 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -45,6 +45,6 @@ DefinitionBlock( #endif // Chipset specific sleep states - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index 70d0bd6ded..f830035318 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -45,6 +45,6 @@ DefinitionBlock( #endif // Chipset specific sleep states - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index 8dc11942a0..dc1dacc66b 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index 95ed8d913d..afc53861bb 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dcp847ske/dsdt.asl b/src/mainboard/intel/dcp847ske/dsdt.asl index 60f4c74241..9d1d26198f 100644 --- a/src/mainboard/intel/dcp847ske/dsdt.asl +++ b/src/mainboard/intel/dcp847ske/dsdt.asl @@ -30,7 +30,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl index 911dceeaf3..75073caed2 100644 --- a/src/mainboard/intel/dg43gt/dsdt.asl +++ b/src/mainboard/intel/dg43gt/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801jx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index 45968fbfc3..d9792ff9d5 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -53,5 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl index 759d669f8a..d7711be75d 100644 --- a/src/mainboard/intel/glkrvp/dsdt.asl +++ b/src/mainboard/intel/glkrvp/dsdt.asl @@ -45,7 +45,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Chrome OS Embedded Controller */ Scope (\_SB.PCI0.LPCB) diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index 9bc42cf4de..2636df15a6 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/denverton_ns/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index ad469faaa7..6657a6ed6e 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -60,7 +60,7 @@ DefinitionBlock( #endif // Chipset specific sleep states - #include <soc/intel/icelake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 8a165518b7..059bcd54c3 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -57,7 +57,7 @@ DefinitionBlock( #endif // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index af5f99d815..6dab56ea77 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -49,7 +49,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl index 48b24b9190..6fccf4917c 100644 --- a/src/mainboard/intel/leafhill/dsdt.asl +++ b/src/mainboard/intel/leafhill/dsdt.asl @@ -39,5 +39,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/littleplains/dsdt.asl b/src/mainboard/intel/littleplains/dsdt.asl index 310ad04741..e5cd0ea1a1 100644 --- a/src/mainboard/intel/littleplains/dsdt.asl +++ b/src/mainboard/intel/littleplains/dsdt.asl @@ -49,5 +49,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl index 48b24b9190..6fccf4917c 100644 --- a/src/mainboard/intel/minnow3/dsdt.asl +++ b/src/mainboard/intel/minnow3/dsdt.asl @@ -39,5 +39,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/minnowmax/dsdt.asl b/src/mainboard/intel/minnowmax/dsdt.asl index 3719154bdd..bea6af7973 100644 --- a/src/mainboard/intel/minnowmax/dsdt.asl +++ b/src/mainboard/intel/minnowmax/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/fsp_baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/intel/mohonpeak/dsdt.asl b/src/mainboard/intel/mohonpeak/dsdt.asl index 310ad04741..e5cd0ea1a1 100644 --- a/src/mainboard/intel/mohonpeak/dsdt.asl +++ b/src/mainboard/intel/mohonpeak/dsdt.asl @@ -49,5 +49,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/fsp_rangeley/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index ac929a6bc4..86ea299aa9 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -43,7 +43,7 @@ DefinitionBlock( } // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl index 5052ba265c..e89b88797f 100644 --- a/src/mainboard/intel/strago/dsdt.asl +++ b/src/mainboard/intel/strago/dsdt.asl @@ -58,7 +58,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 42fd7eab95..ef3e2319d1 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> // Chipset specific sleep states - #include <soc/intel/broadwell/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index c412c4e2ff..d4ffd7ba4c 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -46,5 +46,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index f0dd7eee2c..33ef834c47 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/l520/dsdt.asl b/src/mainboard/lenovo/l520/dsdt.asl index ecd8f27bd3..815600d48c 100644 --- a/src/mainboard/lenovo/l520/dsdt.asl +++ b/src/mainboard/lenovo/l520/dsdt.asl @@ -33,7 +33,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/lenovo/s230u/dsdt.asl b/src/mainboard/lenovo/s230u/dsdt.asl index cc9b7aab09..4e5737b109 100644 --- a/src/mainboard/lenovo/s230u/dsdt.asl +++ b/src/mainboard/lenovo/s230u/dsdt.asl @@ -32,7 +32,7 @@ DefinitionBlock( #include <cpu/intel/common/acpi/cpu.asl> #include <southbridge/intel/bd82x6x/acpi/platform.asl> #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl index 6aafec69c4..eb9c2adf53 100644 --- a/src/mainboard/lenovo/t400/dsdt.asl +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801ix/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Hybrid graphics support code */ #include "acpi/graphics.asl" diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl index afc9b3e4df..5c99f1bbf6 100644 --- a/src/mainboard/lenovo/t410/dsdt.asl +++ b/src/mainboard/lenovo/t410/dsdt.asl @@ -87,7 +87,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ #include "acpi/dock.asl" diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/t420/dsdt.asl +++ b/src/mainboard/lenovo/t420/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t430/dsdt.asl b/src/mainboard/lenovo/t430/dsdt.asl index 48e00767d1..7e80a6f0bd 100644 --- a/src/mainboard/lenovo/t430/dsdt.asl +++ b/src/mainboard/lenovo/t430/dsdt.asl @@ -37,7 +37,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t440p/dsdt.asl b/src/mainboard/lenovo/t440p/dsdt.asl index 3014a57444..82358aa990 100644 --- a/src/mainboard/lenovo/t440p/dsdt.asl +++ b/src/mainboard/lenovo/t440p/dsdt.asl @@ -35,7 +35,7 @@ DefinitionBlock( #include <southbridge/intel/lynxpoint/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Device (\_SB.PCI0) { diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl index 8f8c47dae6..12923215d4 100644 --- a/src/mainboard/lenovo/t60/dsdt.asl +++ b/src/mainboard/lenovo/t60/dsdt.asl @@ -59,7 +59,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Dock support code #include "acpi/dock.asl" diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl index 002dfcaeb6..e0e3a3a94b 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl +++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl @@ -38,5 +38,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index 3e5ede5a22..5fd1c9d653 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -41,7 +41,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> // Chipset specific sleep states - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl index 8c9bd5ad64..4d1281e9e0 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl +++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl index 8a11ec1954..e300234e87 100644 --- a/src/mainboard/lenovo/x200/dsdt.asl +++ b/src/mainboard/lenovo/x200/dsdt.asl @@ -52,7 +52,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801ix/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ #include "acpi/dock.asl" diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index afc9b3e4df..5c99f1bbf6 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -87,7 +87,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Dock support code */ #include "acpi/dock.asl" diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index 1cb4add847..83bf8c43cd 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -52,5 +52,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl index 2bba47ceec..00430bb62a 100644 --- a/src/mainboard/lenovo/x60/dsdt.asl +++ b/src/mainboard/lenovo/x60/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Dock support code #include "acpi/dock.asl" diff --git a/src/mainboard/msi/ms7707/dsdt.asl b/src/mainboard/msi/ms7707/dsdt.asl index 88085399b9..d3e3602c16 100644 --- a/src/mainboard/msi/ms7707/dsdt.asl +++ b/src/mainboard/msi/ms7707/dsdt.asl @@ -30,7 +30,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Device (\_SB.PCI0) { diff --git a/src/mainboard/opencellular/rotundu/dsdt.asl b/src/mainboard/opencellular/rotundu/dsdt.asl index 3719154bdd..bea6af7973 100644 --- a/src/mainboard/opencellular/rotundu/dsdt.asl +++ b/src/mainboard/opencellular/rotundu/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/fsp_baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl index 3bf7fbd430..e84f52563c 100644 --- a/src/mainboard/packardbell/ms2290/dsdt.asl +++ b/src/mainboard/packardbell/ms2290/dsdt.asl @@ -81,5 +81,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index bd49349cde..3cd4ef99ae 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -41,7 +41,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/broadwell/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> /* Mainboard specific */ #include "acpi/mainboard.asl" diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index 1bf202ea47..1cd0531368 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -44,7 +44,7 @@ DefinitionBlock( } // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index e110067901..0112654950 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -43,7 +43,7 @@ DefinitionBlock( } // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl index d33287445d..f9a2abed37 100644 --- a/src/mainboard/roda/rk886ex/dsdt.asl +++ b/src/mainboard/roda/rk886ex/dsdt.asl @@ -51,5 +51,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801gx/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl index f930a14aa1..e8fb13d22f 100644 --- a/src/mainboard/roda/rk9/dsdt.asl +++ b/src/mainboard/roda/rk9/dsdt.asl @@ -53,5 +53,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/i82801ix/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl index 859b4cd157..21ab36926f 100644 --- a/src/mainboard/roda/rv11/dsdt.asl +++ b/src/mainboard/roda/rv11/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index c007432581..e6bbed7ca5 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -56,5 +56,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index 969ef66701..7029106020 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -53,5 +53,5 @@ DefinitionBlock( #include <vendorcode/google/chromeos/acpi/chromeos.asl> /* Chipset specific sleep states */ - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl index 60ba44b6aa..67eca4ac5f 100644 --- a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl +++ b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl @@ -33,7 +33,7 @@ DefinitionBlock( #include <southbridge/intel/bd82x6x/acpi/platform.asl> /* global NVS and variables. */ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> - #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> Scope (\_SB) { Device (PCI0) diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index 9bc42cf4de..2636df15a6 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -50,5 +50,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/denverton_ns/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl index 9ce3ef8bc1..449bcf878f 100644 --- a/src/mainboard/siemens/mc_apl1/dsdt.asl +++ b/src/mainboard/siemens/mc_apl1/dsdt.asl @@ -42,5 +42,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/siemens/mc_tcu3/dsdt.asl b/src/mainboard/siemens/mc_tcu3/dsdt.asl index 3719154bdd..bea6af7973 100644 --- a/src/mainboard/siemens/mc_tcu3/dsdt.asl +++ b/src/mainboard/siemens/mc_tcu3/dsdt.asl @@ -48,7 +48,7 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/fsp_baytrail/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include "acpi/mainboard.asl" } diff --git a/src/mainboard/supermicro/x10slm-f/dsdt.asl b/src/mainboard/supermicro/x10slm-f/dsdt.asl index 3a587b65e3..6ed19eee3a 100644 --- a/src/mainboard/supermicro/x10slm-f/dsdt.asl +++ b/src/mainboard/supermicro/x10slm-f/dsdt.asl @@ -21,7 +21,7 @@ DefinitionBlock("dsdt.aml", "DSDT", 2, OEM_ID, ACPI_TABLE_CREATOR, 0x20181220) #include "acpi/platform.asl" #include <southbridge/intel/lynxpoint/acpi/platform.asl> #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> - #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> #include <cpu/intel/common/acpi/cpu.asl> Device (\_SB.PCI0) diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl index ac929a6bc4..86ea299aa9 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl +++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl @@ -43,7 +43,7 @@ DefinitionBlock( } // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> // Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/up/squared/dsdt.asl b/src/mainboard/up/squared/dsdt.asl index 48b24b9190..6fccf4917c 100644 --- a/src/mainboard/up/squared/dsdt.asl +++ b/src/mainboard/up/squared/dsdt.asl @@ -39,5 +39,5 @@ DefinitionBlock( } /* Chipset specific sleep states */ - #include <soc/intel/apollolake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/soc/intel/apollolake/acpi/sleepstates.asl b/src/soc/intel/apollolake/acpi/sleepstates.asl deleted file mode 100644 index e79f2f0cd0..0000000000 --- a/src/soc/intel/apollolake/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015-2016 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/soc/intel/baytrail/acpi/sleepstates.asl b/src/soc/intel/baytrail/acpi/sleepstates.asl deleted file mode 100644 index 4d1d0b3ea2..0000000000 --- a/src/soc/intel/baytrail/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -// Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/soc/intel/braswell/acpi/sleepstates.asl b/src/soc/intel/braswell/acpi/sleepstates.asl deleted file mode 100644 index d37f9cc803..0000000000 --- a/src/soc/intel/braswell/acpi/sleepstates.asl +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/soc/intel/broadwell/acpi/sleepstates.asl b/src/soc/intel/broadwell/acpi/sleepstates.asl deleted file mode 100644 index 585da9e26e..0000000000 --- a/src/soc/intel/broadwell/acpi/sleepstates.asl +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (\_S1, Package () { 0x1, 0x1, 0x0, 0x0 }) -Name (\_S2, Package () { 0x1, 0x1, 0x0, 0x0 }) -Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 }) -Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/soc/intel/cannonlake/acpi/sleepstates.asl b/src/soc/intel/cannonlake/acpi/sleepstates.asl deleted file mode 100644 index 2a351b6c99..0000000000 --- a/src/soc/intel/cannonlake/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017-2018 Intel Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 }) -Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/soc/intel/denverton_ns/acpi/sleepstates.asl b/src/soc/intel/denverton_ns/acpi/sleepstates.asl deleted file mode 100644 index 7da84135c2..0000000000 --- a/src/soc/intel/denverton_ns/acpi/sleepstates.asl +++ /dev/null @@ -1,22 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 - 2009 coresystems GmbH - * Copyright (C) 2014 - 2017 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -//Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl b/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl deleted file mode 100644 index 8e47f5c7a0..0000000000 --- a/src/soc/intel/fsp_baytrail/acpi/sleepstates.asl +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -// Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -#if CONFIG(HAVE_ACPI_RESUME) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -#endif -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/soc/intel/icelake/acpi/sleepstates.asl b/src/soc/intel/icelake/acpi/sleepstates.asl deleted file mode 100644 index 13cc3582aa..0000000000 --- a/src/soc/intel/icelake/acpi/sleepstates.asl +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Intel Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/soc/intel/skylake/acpi/sleepstates.asl b/src/soc/intel/skylake/acpi/sleepstates.asl deleted file mode 100644 index 905a3e2e50..0000000000 --- a/src/soc/intel/skylake/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (\_S4, Package () { 0x6, 0x6, 0x0, 0x0 }) -Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/southbridge/intel/bd82x6x/acpi/sleepstates.asl b/src/southbridge/intel/bd82x6x/acpi/sleepstates.asl deleted file mode 100644 index 4d1d0b3ea2..0000000000 --- a/src/southbridge/intel/bd82x6x/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -// Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/southbridge/intel/i82801ix/acpi/sleepstates.asl b/src/southbridge/intel/common/acpi/sleepstates.asl index 79818a109a..79818a109a 100644 --- a/src/southbridge/intel/i82801ix/acpi/sleepstates.asl +++ b/src/southbridge/intel/common/acpi/sleepstates.asl diff --git a/src/southbridge/intel/fsp_rangeley/acpi/sleepstates.asl b/src/southbridge/intel/fsp_rangeley/acpi/sleepstates.asl deleted file mode 100644 index cd391fb76a..0000000000 --- a/src/southbridge/intel/fsp_rangeley/acpi/sleepstates.asl +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) - -/* - * S1 and S3 sleep states are not supported - * Name(\_S1, Package(){0x1,0x1,0x0,0x0}) - * Name(\_S3, Package(){0x5,0x5,0x0,0x0}) - */ - -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/southbridge/intel/i82801gx/acpi/sleepstates.asl b/src/southbridge/intel/i82801gx/acpi/sleepstates.asl deleted file mode 100644 index 4d1d0b3ea2..0000000000 --- a/src/southbridge/intel/i82801gx/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -// Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) diff --git a/src/southbridge/intel/i82801jx/acpi/sleepstates.asl b/src/southbridge/intel/i82801jx/acpi/sleepstates.asl deleted file mode 100644 index 79818a109a..0000000000 --- a/src/southbridge/intel/i82801jx/acpi/sleepstates.asl +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -#if !CONFIG(HAVE_ACPI_RESUME) -Name(\_S1, Package(){0x1,0x0,0x0,0x0}) -#else -Name(\_S3, Package(){0x5,0x0,0x0,0x0}) -#endif -Name(\_S4, Package(){0x6,0x0,0x0,0x0}) -Name(\_S5, Package(){0x7,0x0,0x0,0x0}) diff --git a/src/southbridge/intel/lynxpoint/acpi/sleepstates.asl b/src/southbridge/intel/lynxpoint/acpi/sleepstates.asl deleted file mode 100644 index 4d1d0b3ea2..0000000000 --- a/src/southbridge/intel/lynxpoint/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name(\_S0, Package(){0x0,0x0,0x0,0x0}) -// Name(\_S1, Package(){0x1,0x1,0x0,0x0}) -Name(\_S3, Package(){0x5,0x5,0x0,0x0}) -Name(\_S4, Package(){0x6,0x6,0x0,0x0}) -Name(\_S5, Package(){0x7,0x7,0x0,0x0}) |