diff options
| author | statham_chu <statham_chu@pegatron.corp-partner.google.com> | 2018-09-20 16:02:04 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-28 09:53:19 +0000 |
| commit | 200262c87d1b32a47c7f7c67f92e77454c9cf262 (patch) | |
| tree | b5d44affa7cca1a09c228491ed00ebad5d075cf9 /src | |
| parent | b269f873b0a0d43911adc907a53bbebadc742b78 (diff) | |
mainboard/google/poppy/variants/rammus: Modify VR setting
We refer to Intel Doc#594883.
The recommended Ac/Dc loadline values are as below:
# VR Settings Configuration for 4 Domains
#+----------------+-------+-------+-------+-------+
#| Domain/Setting | SA | IA | GTUS | GTS |
#+----------------+-------+-------+-------+-------+
#| Psi1Threshold | 20A | 20A | 20A | 20A |
#| Psi2Threshold | 2A | 2A | 2A | 2A |
#| Psi3Threshold | 1A | 1A | 1A | 1A |
#| Psi3Enable | 1 | 1 | 1 | 1 |
#| Psi4Enable | 1 | 1 | 1 | 1 |
#| ImonSlope | 0 | 0 | 0 | 0 |
#| ImonOffset | 0 | 0 | 0 | 0 |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
#| AcLoadline | 14.4 | 4.2 | 5.7 | 4.47 |
#| DcLoadline | 14.0 | 4.17 | 4.2 | 4.3 |
#+----------------+-------+-------+-------+-------+
BUG=b:112167318
BRANCH=master
TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage
Flash FW to DUT, and make sure system boots up.
Change-Id: I2d83d835ec841ac4cc811a0a69f74d203d5ea173
Signed-off-by: statham_chu <statham_chu@pegatron.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28695
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/rammus/devicetree.cb | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 7b851ac811..b750cb8efd 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -83,8 +83,8 @@ chip soc/intel/skylake #| ImonSlope | 0 | 0 | 0 | 0 | #| ImonOffset | 0 | 0 | 0 | 0 | #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | - #| AcLoadline | 15 | 5.7 | 5.5 | 5.5 | - #| DcLoadline | 14.3 | 4.83 | 4.2 | 4.2 | + #| AcLoadline | 14.4 | 4.2 | 5.7 | 4.47 | + #| DcLoadline | 14.0 | 4.17 | 4.2 | 4.3 | #+----------------+-------+-------+-------+-------+ register "domain_vr_config[VR_SYSTEM_AGENT]" = "{ .vr_config_enable = 1, @@ -96,8 +96,8 @@ chip soc/intel/skylake .imon_slope = 0x0, .imon_offset = 0x0, .voltage_limit = 1520, - .ac_loadline = 1500, - .dc_loadline = 1430, + .ac_loadline = 1440, + .dc_loadline = 1400, }" register "domain_vr_config[VR_IA_CORE]" = "{ @@ -110,8 +110,8 @@ chip soc/intel/skylake .imon_slope = 0x0, .imon_offset = 0x0, .voltage_limit = 1520, - .ac_loadline = 570, - .dc_loadline = 483, + .ac_loadline = 420, + .dc_loadline = 417, }" register "domain_vr_config[VR_GT_UNSLICED]" = "{ @@ -124,7 +124,7 @@ chip soc/intel/skylake .imon_slope = 0x0, .imon_offset = 0x0, .voltage_limit = 1520, - .ac_loadline = 550, + .ac_loadline = 570, .dc_loadline = 420, }" @@ -138,8 +138,8 @@ chip soc/intel/skylake .imon_slope = 0x0, .imon_offset = 0x0, .voltage_limit = 1520, - .ac_loadline = 550, - .dc_loadline = 420, + .ac_loadline = 447, + .dc_loadline = 430, }" # Enable Root port 1. |