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authorzbao <fishbaozi@gmail.com>2016-05-24 21:21:26 +0800
committerZheng Bao <fishbaozi@gmail.com>2016-05-30 06:09:21 +0200
commite0849350aa74c58751675da389d717a93c365030 (patch)
tree554128e545f0fa425d27e7bd2830c469954af7f2 /src
parent69088c2825d9bcee7b2cfae699b648ed33e0c7d7 (diff)
AMD/spi: Do not reset fifo after skipping the sent bytes
After we skip the bytes we send, the fifo pointer is at right position. Reseting the fifo will change it to a wrong place. Please view the flashrom code, which tells the same thing. https://code.coreboot.org/p/flashrom/source/tree/HEAD/trunk/sb600spi.c#L257 Change-Id: I31d487ce32c0d7ca3dead36d2b14611e73b1ad60 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/14955 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index e8ab372eaa..31160bdcd9 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -143,7 +143,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
cmd = spi_read(SPI_REG_FIFO);
}
- reset_internal_fifo_pointer();
for (count = 0; count < bytesin; count++, din++) {
*(uint8_t *)din = spi_read(SPI_REG_FIFO);
}