diff options
| author | David Hendricks <dhendrix@chromium.org> | 2013-04-25 18:00:58 -0700 |
|---|---|---|
| committer | David Hendricks <dhendrix@chromium.org> | 2013-04-26 08:50:11 +0200 |
| commit | dfad17de0293a56f68626ce47bfc14300f15e15c (patch) | |
| tree | c8fa31438f0d81c0d5c5f1ed49f03452a7b88a40 /src | |
| parent | 64a69e8e4d942b08732e77fb82b0ea364eb2f398 (diff) | |
exynos5250: uncomment $(INTERMEDIATE)
This makes the intermediate rule visible so BL1 gets automatically
placed in the final image.
Change-Id: Iffb0268e5bbcbe135f2d39863ed64fa302409a22
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3141
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/samsung/exynos5250/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 25d1bc57b8..403c198fa5 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -1,7 +1,7 @@ # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware # image outside of CBFS -#INTERMEDIATE += exynos5250_add_bl1 +INTERMEDIATE += exynos5250_add_bl1 bootblock-y += pinmux.c mct.c power.c # Clock is required for UART |