igd.asl rewrite

Old igd.asl had inconsistent addresses (between _DOD and actual device)
and ghost devices. Any of those is enough to make brightness on windows
fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous
copying of the same thing 6 times per chipset. Leave only hooking up and
chipset-specific part in chipset directory. Move NVS handling and ACPI-spec
parts to a common file.

Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7472
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>

136 files changed, 896 insertions, 3005 deletions

diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig
index f4c7e45690..f726e6f1e7 100644
--- a/src/drivers/intel/gma/Kconfig
+++ b/src/drivers/intel/gma/Kconfig
@@ -36,3 +36,7 @@ config INTEL_EDID
 config INTEL_INT15
 	bool
 	default n
+
+config INTEL_GMA_ACPI
+	bool
+	default n
diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc
index 24599973b2..6bd9b71804 100644
--- a/src/drivers/intel/gma/Makefile.inc
+++ b/src/drivers/intel/gma/Makefile.inc
@@ -23,3 +23,4 @@ ramstage-$(CONFIG_INTEL_EDID) += edid.c vbt.c
 ifeq ($(CONFIG_VGA_ROM_RUN),y)
 ramstage-$(CONFIG_INTEL_INT15) += int15.c
 endif
+ramstage-$(CONFIG_INTEL_GMA_ACPI) += acpi.c
\ No newline at end of file
diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c
new file mode 100644
index 0000000000..c3a9b8a266
--- /dev/null
+++ b/src/drivers/intel/gma/acpi.c
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2014 Vladimir Serbinenko
+ * Subject to the GNU GPL v2, or (at your option) any later version.
+ */
+
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
+#include <string.h>
+#include "i915.h"
+
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf)
+{
+	size_t i;
+	const char *names[] = { "UNK", "VGA", "TV", "DVI", "LCD" };
+	int counters[ARRAY_SIZE(names)];
+
+	memset(counters, 0, sizeof(counters));
+
+	acpigen_write_scope("\\_SB.PCI0.GFX0");
+
+	/*
+	Method (_DOD, 0)
+	{
+		Return (Package() {
+				0x5a5a5a5a,
+				0x5a5a5a5a,
+				0x5a5a5a5a
+			})
+	}
+	*/
+	acpigen_write_method("_DOD", 0);
+	acpigen_emit_byte(0xa4); /* ReturnOp.  */
+	acpigen_write_package(conf->ndid);
+
+	for (i = 0; i < conf->ndid; i++) {
+		acpigen_write_dword (conf->did[i] | 0x80010000);
+	}
+	acpigen_pop_len(); /* End Package. */
+	acpigen_pop_len(); /* End Method. */
+
+	for (i = 0; i < conf->ndid; i++) {
+		char name[10];
+		char *ptr;
+		int kind;
+		kind = (conf->did[i] >> 8) & 0xf;
+		if (kind >= ARRAY_SIZE(names)) {
+			kind = 0;
+		}
+		strcpy(name, names[kind]);
+		for (ptr = name; *ptr; ptr++);
+		*ptr++ = counters[kind] + '0';
+		*ptr++ = '\0';
+		counters[kind]++;
+		acpigen_write_device(name);
+		/* Name (_ADR, 0x0410) */
+		acpigen_write_name_dword("_ADR", conf->did[i] & 0xffff);
+
+		/* ACPI brightness for LCD.  */
+		if (kind == 4) {
+			/*
+			  Method (_BCL, 0, NotSerialized)
+			  {
+			  	Return (^^XBCL())
+			  }
+			*/
+			acpigen_write_method("_BCL", 0);
+			acpigen_emit_byte(0xa4); /* ReturnOp.  */
+			acpigen_emit_namestring("^^XBCL");
+			acpigen_pop_len();
+
+			/*
+			  Method (_BCM, 1, NotSerialized)
+			  {
+			  	^^XBCM(Arg0)
+			  }
+			*/
+			acpigen_write_method("_BCM", 1);
+			acpigen_emit_namestring("^^XBCM");
+			acpigen_emit_byte(0x68); /* Arg0Op.  */
+			acpigen_pop_len();
+
+			/*
+			  Method (_BQC, 0, NotSerialized)
+			  {
+			  	Return (^^XBQC())
+			  }
+			*/
+			acpigen_write_method("_BQC", 0);
+			acpigen_emit_byte(0xa4); /* ReturnOp.  */
+			acpigen_emit_namestring("^^XBQC");
+			acpigen_pop_len();
+		}
+
+		/*
+		Method(_DCS, 0)
+		{
+			Return (^^XDCS(<device number>))
+		}
+		*/
+		acpigen_write_method("_DCS", 0);
+		acpigen_emit_byte(0xa4); /* ReturnOp.  */
+		acpigen_emit_namestring("^^XDCS");
+		acpigen_write_byte(i);
+		acpigen_pop_len();
+
+		/*
+		Method(_DGS, 0)
+		{
+			Return (^^XDGS(<device number>))
+		}
+		*/
+		acpigen_write_method("_DGS", 0);
+		acpigen_emit_byte(0xa4); /* ReturnOp.  */
+		acpigen_emit_namestring("^^XDGS");
+		acpigen_write_byte(i);
+		acpigen_pop_len();
+
+		/*
+		Method(_DSS, 1)
+		{
+			^^XDSS(0x5a, Arg0)
+		}
+		*/
+		acpigen_write_method("_DSS", 0);
+		acpigen_emit_namestring("^^XDSS");
+		acpigen_write_byte(i);
+		acpigen_emit_byte(0x68); /* Arg0Op.  */
+		acpigen_pop_len();
+
+		acpigen_pop_len();
+	}
+
+	acpigen_pop_len();
+}
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h
index ef9e68ee05..37e2e4910c 100644
--- a/src/drivers/intel/gma/i915.h
+++ b/src/drivers/intel/gma/i915.h
@@ -292,8 +292,15 @@ struct i915_gpu_controller_info
 	int link_frequency_270_mhz;
 	int lvds_num_lanes;
 	u32 backlight;
+	int ndid;
+	u32 did[5];
 };
 
+void
+drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf);
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void);
+
 int i915lightup(unsigned int physbase, unsigned int mmio,
 		unsigned int gfx, unsigned int init_fb);
 int panel_lightup(struct intel_dp *dp, unsigned int init_fb);
diff --git a/src/drivers/intel/gma/igd.asl b/src/drivers/intel/gma/igd.asl
new file mode 100644
index 0000000000..31e8fecbd0
--- /dev/null
+++ b/src/drivers/intel/gma/igd.asl
@@ -0,0 +1,113 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+	External(LCD0, DeviceObj)
+
+	Name (BRCT, 0)
+
+	Method(BRID, 1, NotSerialized)
+	{
+		Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
+		If (LEqual (Local0, Ones))
+		{
+			Return (Subtract(SizeOf(BRIG), One))
+		}
+		Return (Local0)
+	}
+
+	Method (XBCL, 0, NotSerialized)
+	{
+		Store (1, BRCT)
+		Return (BRIG)
+	}
+
+	/* Display Output Switching */
+	Method (_DOS, 1)
+	{
+		/* Windows 2000 and Windows XP call _DOS to enable/disable
+		 * Display Output Switching during init and while a switch
+		 * is already active
+		 */
+		Store (And(Arg0, 7), DSEN)
+	}
+
+	/* Using Notify is the right way. But Windows doesn't handle
+	   it well. So use both method in a way to avoid double action.
+	 */
+	Method (DECB, 0, NotSerialized)
+	{
+		If (BRCT)
+		{
+			Notify (LCD0, 0x87)
+		} Else {
+			Store (BRID (XBQC ()), Local0)
+			If (LNotEqual (Local0, 2))
+			{
+				Decrement (Local0)
+			}
+			XBCM (DerefOf (Index (BRIG, Local0)))
+		}
+	}
+
+	Method (INCB, 0, NotSerialized)
+	{
+		If (BRCT)
+		{
+			Notify (LCD0, 0x86)
+		} Else {
+			Store (BRID (XBQC ()), Local0)
+			If (LNotEqual (Local0, Subtract(SizeOf(BRIG), One)))
+			{
+				Increment (Local0)
+			}
+			XBCM (DerefOf (Index (BRIG, Local0)))
+		}
+	}
+
+	/* Device Current Status */
+	Method(XDCS, 1)
+	{
+		TRAP(1)
+		If (And(CSTE, ShiftLeft (1, Arg0))) {
+			Return (0x1f)
+		}
+		Return(0x1d)
+	}
+
+	/* Query Device Graphics State */
+	Method(XDGS, 1)
+	{
+		If (And(NSTE, ShiftLeft (1, Arg0))) {
+			Return(1)
+		}
+		Return(0)
+	}
+
+	/* Device Set State */
+	Method(XDSS, 2)
+	{
+		/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
+		 * display switch was completed
+		 */
+		If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
+			Store (NSTE, CSTE)
+		}
+	}
diff --git a/src/mainboard/apple/macbook21/acpi/video.asl b/src/mainboard/apple/macbook21/acpi/video.asl
deleted file mode 100644
index 9b8750b06e..0000000000
--- a/src/mainboard/apple/macbook21/acpi/video.asl
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-Device (DSPC)
-{
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
-	Method(BRTD, 0, NotSerialized)
-	{
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
-	}
-
-	Method(BRTU, 0, NotSerialized)
-	{
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
-	}
-}
diff --git a/src/mainboard/apple/macbook21/acpi_tables.c b/src/mainboard/apple/macbook21/acpi_tables.c
index 64b1fc6bad..4e4cf1e576 100644
--- a/src/mainboard/apple/macbook21/acpi_tables.c
+++ b/src/mainboard/apple/macbook21/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
index 0185e94f64..e0b992c578 100644
--- a/src/mainboard/apple/macbook21/cmos.default
+++ b/src/mainboard/apple/macbook21/cmos.default
@@ -9,7 +9,6 @@ boot_default=0x40
 cmos_defaults_loaded=Yes
 lpt=Enable
 volume=0x3
-tft_brightness=0xff
 first_battery=Primary
 bluetooth=Enable
 wlan=Enable
diff --git a/src/mainboard/apple/macbook21/cmos.layout b/src/mainboard/apple/macbook21/cmos.layout
index 3211f5cd86..5bb8a37851 100644
--- a/src/mainboard/apple/macbook21/cmos.layout
+++ b/src/mainboard/apple/macbook21/cmos.layout
@@ -85,7 +85,6 @@ entries
 1052         4       r       0        C1DRT1
 
 1064         8       h       0        volume
-1072         8       h       0        tft_brightness
 1080         1       e       9        first_battery
 1081         1       e       1        bluetooth
 1082         1       e       1        wwan
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index e70ca052bd..04302175c7 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -20,11 +20,14 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_hotplug" = "0x00000220"
 	register "gpu_lvds_use_spread_spectrum_clock" = "1"
 	register "gpu_lvds_is_dual_channel" = "0"
-	register "gpu_backlight" = "0x1280128"
+	register "gpu_backlight" = "0x1290128"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c
index 30f9b3c237..a7256a5449 100644
--- a/src/mainboard/emulation/qemu-q35/mainboard.c
+++ b/src/mainboard/emulation/qemu-q35/mainboard.c
@@ -25,6 +25,7 @@
 #include <pc80/keyboard.h>
 #include <arch/io.h>
 #include <console/console.h>
+#include <drivers/intel/gma/i915.h>
 
 #define Q35_PAM0            0x90
 
@@ -33,6 +34,19 @@ static const unsigned char qemu_q35_irqs[] = {
 	10, 10, 11, 11,
 };
 
+struct i915_gpu_controller_info gfx_controller_info = {
+	.ndid = 3,
+	.did = {
+		0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005
+	}
+};
+
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{	
+	return &gfx_controller_info;
+}
+
 static void qemu_nb_init(device_t dev)
 {
 	/* Map memory at 0xc0000 - 0xfffff */
diff --git a/src/mainboard/getac/p470/acpi/ec.asl b/src/mainboard/getac/p470/acpi/ec.asl
index 67a028eeb8..e9d46e452c 100644
--- a/src/mainboard/getac/p470/acpi/ec.asl
+++ b/src/mainboard/getac/p470/acpi/ec.asl
@@ -192,7 +192,7 @@ Device(EC0)
 	{
 		Store(0x3f, HOTK)
 		If(IGDS) {
-			HKDS(10)
+			Notify (\_SB.PCI0.GFX0, 0x82)
 		} Else {
 			TRAP(0xE1)
 		}
diff --git a/src/mainboard/getac/p470/acpi/video.asl b/src/mainboard/getac/p470/acpi/video.asl
deleted file mode 100644
index 1c9ccfde60..0000000000
--- a/src/mainboard/getac/p470/acpi/video.asl
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c
index bc805dc678..b6cd654760 100644
--- a/src/mainboard/getac/p470/acpi_tables.c
+++ b/src/mainboard/getac/p470/acpi_tables.c
@@ -37,14 +37,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* Enable COM port(s) */
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x00;
-
-	/* IGD Displays  */
-	gnvs->ndid = 2;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000410;
-	gnvs->did[2] = 0x80000320;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 static long acpi_create_ecdt(acpi_ecdt_t * ecdt)
diff --git a/src/mainboard/getac/p470/devicetree.cb b/src/mainboard/getac/p470/devicetree.cb
index f32deadab6..cbf7651323 100644
--- a/src/mainboard/getac/p470/devicetree.cb
+++ b/src/mainboard/getac/p470/devicetree.cb
@@ -19,6 +19,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "2"
+	register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c
index 23a8a00ffa..70eeeb2bdc 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi_tables.c
@@ -56,14 +56,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
index 3c7641a171..fa949e959a 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
@@ -1,4 +1,8 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_LGA1155
 			device lapic 0 on end
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/acpi/mainboard.asl b/src/mainboard/gigabyte/ga-b75m-d3v/acpi/mainboard.asl
deleted file mode 100644
index 507dd7d8af..0000000000
--- a/src/mainboard/gigabyte/ga-b75m-d3v/acpi/mainboard.asl
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-Method (BRTN, 1, Serialized)
-{
-	If (LEqual (And (DID1, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD01, Arg0)
-	}
-
-	If (LEqual (And (DID2, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD02, Arg0)
-	}
-
-	If (LEqual (And (DID3, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD03, Arg0)
-	}
-
-	If (LEqual (And (DID4, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD04, Arg0)
-	}
-
-	If (LEqual (And (DID5, 0x0F00), 0x0400))
-	{
-		Notify (\_SB.PCI0.GFX0.DD05, Arg0)
-	}
-}
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c b/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c
index 23a8a00ffa..70eeeb2bdc 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/acpi_tables.c
@@ -56,14 +56,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
index 1c08359cb3..369bc6f9da 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_LGA1155
 			device lapic 0 on end
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
index fcc6f8fa30..e79d611e7a 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
@@ -11,7 +11,6 @@ DefinitionBlock(
 
 	// Some generic macros
 	#include "acpi/platform.asl"
-	#include "acpi/mainboard.asl"
 	#include <cpu/intel/model_206ax/acpi/cpu.asl>
 	/* global NVS and variables.  */
 	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
diff --git a/src/mainboard/google/bolt/acpi_tables.c b/src/mainboard/google/bolt/acpi_tables.c
index dba5348367..42dcb07953 100644
--- a/src/mainboard/google/bolt/acpi_tables.c
+++ b/src/mainboard/google/bolt/acpi_tables.c
@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/bolt/devicetree.cb b/src/mainboard/google/bolt/devicetree.cb
index 1d1eab52a9..1acd781a24 100644
--- a/src/mainboard/google/bolt/devicetree.cb
+++ b/src/mainboard/google/bolt/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c
index f5e87d1f16..bf0c0dc0fb 100644
--- a/src/mainboard/google/butterfly/acpi_tables.c
+++ b/src/mainboard/google/butterfly/acpi_tables.c
@@ -54,13 +54,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// TODO: MLR
 	// The firmware read/write status is a "virtual" switch and
diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb
index 90925b95f3..47d6a10efc 100644
--- a/src/mainboard/google/butterfly/devicetree.cb
+++ b/src/mainboard/google/butterfly/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/falco/acpi_tables.c b/src/mainboard/google/falco/acpi_tables.c
index 238b48d0fd..8a6ef01320 100644
--- a/src/mainboard/google/falco/acpi_tables.c
+++ b/src/mainboard/google/falco/acpi_tables.c
@@ -60,13 +60,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb
index 7a8e757877..8cdb0325d3 100644
--- a/src/mainboard/google/falco/devicetree.cb
+++ b/src/mainboard/google/falco/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/link/acpi_tables.c b/src/mainboard/google/link/acpi_tables.c
index 36edf5b0da..3f5adea811 100644
--- a/src/mainboard/google/link/acpi_tables.c
+++ b/src/mainboard/google/link/acpi_tables.c
@@ -64,14 +64,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 1;
-	gnvs->did[0] = 0x80000000;
-	gnvs->did[1] = 0x80000000;
-	gnvs->did[2] = 0x00000000;
-	gnvs->did[3] = 0x00000000;
-	gnvs->did[4] = 0x00000000;
-
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
 		ACTIVE_ECFW_RO : ACTIVE_ECFW_RW;
diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb
index 5333dfc2c3..382a8c4d9f 100644
--- a/src/mainboard/google/link/devicetree.cb
+++ b/src/mainboard/google/link/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "1"
+	register "gfx.did" = "{ 0x80000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/panther/acpi_tables.c b/src/mainboard/google/panther/acpi_tables.c
index 2876e02072..c4efd7e5c1 100644
--- a/src/mainboard/google/panther/acpi_tables.c
+++ b/src/mainboard/google/panther/acpi_tables.c
@@ -77,13 +77,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	// SuperIO is always RO
diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb
index 2032fd426b..af6043f52c 100644
--- a/src/mainboard/google/panther/devicetree.cb
+++ b/src/mainboard/google/panther/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Disable eDP Hotplug
 	register "gpu_dp_d_hotplug" = "0x00"
diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c
index e2c2d4a4ce..14d5420aa9 100644
--- a/src/mainboard/google/parrot/acpi_tables.c
+++ b/src/mainboard/google/parrot/acpi_tables.c
@@ -55,13 +55,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = parrot_ec_running_ro() ?
diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb
index a4baafd9ca..034309fb95 100644
--- a/src/mainboard/google/parrot/devicetree.cb
+++ b/src/mainboard/google/parrot/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort B Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
diff --git a/src/mainboard/google/peppy/acpi_tables.c b/src/mainboard/google/peppy/acpi_tables.c
index 82c4666283..47288aa7db 100644
--- a/src/mainboard/google/peppy/acpi_tables.c
+++ b/src/mainboard/google/peppy/acpi_tables.c
@@ -69,13 +69,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/peppy/devicetree.cb b/src/mainboard/google/peppy/devicetree.cb
index 894d3ef900..505b39e0b9 100644
--- a/src/mainboard/google/peppy/devicetree.cb
+++ b/src/mainboard/google/peppy/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c
index dba5348367..42dcb07953 100644
--- a/src/mainboard/google/slippy/acpi_tables.c
+++ b/src/mainboard/google/slippy/acpi_tables.c
@@ -66,13 +66,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = google_ec_running_ro() ?
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb
index f50882cc6d..3d4c8c5068 100644
--- a/src/mainboard/google/slippy/devicetree.cb
+++ b/src/mainboard/google/slippy/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable eDP Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c
index 89f249f6ed..4fa736fc8a 100644
--- a/src/mainboard/google/stout/acpi_tables.c
+++ b/src/mainboard/google/stout/acpi_tables.c
@@ -58,13 +58,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	gnvs->chromeos.vbt2 = get_recovery_mode_switch() ?
diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb
index 4ac89f629f..cd33cd76dc 100644
--- a/src/mainboard/google/stout/devicetree.cb
+++ b/src/mainboard/google/stout/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/ibase/mb899/acpi/video.asl b/src/mainboard/ibase/mb899/acpi/video.asl
deleted file mode 100644
index e4f764c620..0000000000
--- a/src/mainboard/ibase/mb899/acpi/video.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
diff --git a/src/mainboard/ibase/mb899/acpi_tables.c b/src/mainboard/ibase/mb899/acpi_tables.c
index 075aeeca0c..5972382147 100644
--- a/src/mainboard/ibase/mb899/acpi_tables.c
+++ b/src/mainboard/ibase/mb899/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/ibase/mb899/devicetree.cb b/src/mainboard/ibase/mb899/devicetree.cb
index a26d7c2c8e..77ceaddc52 100644
--- a/src/mainboard/ibase/mb899/devicetree.cb
+++ b/src/mainboard/ibase/mb899/devicetree.cb
@@ -1,4 +1,8 @@
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
+
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478
 			device lapic 0 on end
diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c
index 5f82911ceb..2f5e0cd592 100644
--- a/src/mainboard/intel/baskingridge/acpi_tables.c
+++ b/src/mainboard/intel/baskingridge/acpi_tables.c
@@ -79,13 +79,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	/* TPM Present */
 	gnvs->tpmp = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 #if CONFIG_CHROMEOS
 	/* Emerald Lake has no EC (?) */
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb
index cd341d13f8..a9cfb49527 100644
--- a/src/mainboard/intel/baskingridge/devicetree.cb
+++ b/src/mainboard/intel/baskingridge/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/haswell
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/intel/cougar_canyon2/acpi_tables.c b/src/mainboard/intel/cougar_canyon2/acpi_tables.c
index f9c1e0959e..fce84fefde 100644
--- a/src/mainboard/intel/cougar_canyon2/acpi_tables.c
+++ b/src/mainboard/intel/cougar_canyon2/acpi_tables.c
@@ -62,16 +62,7 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 1;
 	gnvs->s5u1 = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	acpi_update_thermal_table(gnvs);
-
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/intel/cougar_canyon2/devicetree.cb b/src/mainboard/intel/cougar_canyon2/devicetree.cb
index c386853a1c..d7c6aabd4e 100644
--- a/src/mainboard/intel/cougar_canyon2/devicetree.cb
+++ b/src/mainboard/intel/cougar_canyon2/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/fsp_sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/intel/d945gclf/acpi/video.asl b/src/mainboard/intel/d945gclf/acpi/video.asl
deleted file mode 100644
index 83bbabd788..0000000000
--- a/src/mainboard/intel/d945gclf/acpi/video.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c
index bb6218a854..1d7bcb0e88 100644
--- a/src/mainboard/intel/emeraldlake2/acpi_tables.c
+++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c
@@ -78,13 +78,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 1;
 	gnvs->s5u1 = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	acpi_update_thermal_table(gnvs);
 
diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb
index e5a8ea0edd..0b3e7888d6 100644
--- a/src/mainboard/intel/emeraldlake2/devicetree.cb
+++ b/src/mainboard/intel/emeraldlake2/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/iwave/iWRainbowG6/acpi/video.asl b/src/mainboard/iwave/iWRainbowG6/acpi/video.asl
deleted file mode 100644
index 1c9ccfde60..0000000000
--- a/src/mainboard/iwave/iWRainbowG6/acpi/video.asl
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
diff --git a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
index 63d6c1ec2d..ef7ad44c04 100644
--- a/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
+++ b/src/mainboard/iwave/iWRainbowG6/acpi_tables.c
@@ -40,14 +40,6 @@ void acpi_create_gnvs(global_nvs_t * gnvs)
 	/* Enable both COM ports. */
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
-
-	/* IGD Displays. */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/iwave/iWRainbowG6/devicetree.cb b/src/mainboard/iwave/iWRainbowG6/devicetree.cb
index 84cfc4b203..29e9e5e38b 100644
--- a/src/mainboard/iwave/iWRainbowG6/devicetree.cb
+++ b/src/mainboard/iwave/iWRainbowG6/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sch
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_441
diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c
index 075aeeca0c..5972382147 100644
--- a/src/mainboard/kontron/986lcd-m/acpi_tables.c
+++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index 6a5b22151f..b9ddf75fb1 100644
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/kontron/ktqm77/acpi_tables.c b/src/mainboard/kontron/ktqm77/acpi_tables.c
index 32e539f8cf..54ff5d471e 100644
--- a/src/mainboard/kontron/ktqm77/acpi_tables.c
+++ b/src/mainboard/kontron/ktqm77/acpi_tables.c
@@ -52,14 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 0;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	acpi_update_thermal_table(gnvs);
 }
 
diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb
index 855fd5c7f6..24306ef8f9 100644
--- a/src/mainboard/kontron/ktqm77/devicetree.cb
+++ b/src/mainboard/kontron/ktqm77/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989
diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c
index 3133f9daf4..bcedb02674 100644
--- a/src/mainboard/lenovo/t420s/acpi_tables.c
+++ b/src/mainboard/lenovo/t420s/acpi_tables.c
@@ -51,14 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 7fd6a53ce7..e43ac48bc0 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -1,4 +1,6 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl
index fbe1ae7c15..b40b6dbc5b 100644
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ b/src/mainboard/lenovo/t420s/dsdt.asl
@@ -20,8 +20,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
 #define HAVE_LCD_SCREEN 1
diff --git a/src/mainboard/lenovo/t430s/acpi_tables.c b/src/mainboard/lenovo/t430s/acpi_tables.c
index 59fc7a6a18..041e4e39b5 100644
--- a/src/mainboard/lenovo/t430s/acpi_tables.c
+++ b/src/mainboard/lenovo/t430s/acpi_tables.c
@@ -37,14 +37,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
-
 	// the lid is open by default.
 	gnvs->lids = 1;
 
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index af3de6c96d..23bce4e882 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -1,4 +1,6 @@
 chip northbridge/intel/sandybridge
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl
index fbe1ae7c15..b40b6dbc5b 100644
--- a/src/mainboard/lenovo/t430s/dsdt.asl
+++ b/src/mainboard/lenovo/t430s/dsdt.asl
@@ -20,8 +20,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
 #define HAVE_LCD_SCREEN 1
diff --git a/src/mainboard/lenovo/t520/acpi_tables.c b/src/mainboard/lenovo/t520/acpi_tables.c
index abb6b31286..bb0f1a444f 100644
--- a/src/mainboard/lenovo/t520/acpi_tables.c
+++ b/src/mainboard/lenovo/t520/acpi_tables.c
@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index bf575d8da1..3688145887 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index fbe1ae7c15..42165a10bd 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",
diff --git a/src/mainboard/lenovo/t530/acpi_tables.c b/src/mainboard/lenovo/t530/acpi_tables.c
index abb6b31286..bb0f1a444f 100644
--- a/src/mainboard/lenovo/t530/acpi_tables.c
+++ b/src/mainboard/lenovo/t530/acpi_tables.c
@@ -51,13 +51,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index d59524bf02..d4c5837963 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl
index fbe1ae7c15..42165a10bd 100644
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",
diff --git a/src/mainboard/lenovo/t60/acpi/video.asl b/src/mainboard/lenovo/t60/acpi/video.asl
index 1a7a596e98..31d5b0495b 100644
--- a/src/mainboard/lenovo/t60/acpi/video.asl
+++ b/src/mainboard/lenovo/t60/acpi/video.asl
@@ -20,35 +20,17 @@
 
 #include "smi.h"
 
-Device (DSPC)
+Scope (\)
 {
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
 	Method(BRTD, 0, NotSerialized)
 	{
 		Trap(SMI_BRIGHTNESS_DOWN)
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
+		\_SB.PCI0.GFX0.DECB()
 	}
 
 	Method(BRTU, 0, NotSerialized)
 	{
 		Trap(SMI_BRIGHTNESS_UP)
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-		}
+		\_SB.PCI0.GFX0.INCB()
 	}
 }
diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c
index 64b1fc6bad..4e4cf1e576 100644
--- a/src/mainboard/lenovo/t60/acpi_tables.c
+++ b/src/mainboard/lenovo/t60/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb
index 40ce3d8bdc..719fa9a38b 100644
--- a/src/mainboard/lenovo/t60/devicetree.cb
+++ b/src/mainboard/lenovo/t60/devicetree.cb
@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl
index 92aac6ced7..b746b69f98 100644
--- a/src/mainboard/lenovo/t60/dsdt.asl
+++ b/src/mainboard/lenovo/t60/dsdt.asl
@@ -19,8 +19,8 @@
  */
 
 #define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \BRTU
+#define BRIGHTNESS_DOWN \BRTD
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 
 DefinitionBlock(
@@ -45,6 +45,12 @@ DefinitionBlock(
 	// mainboard specific devices
 	#include "acpi/mainboard.asl"
 
+	Scope (\)
+	{
+		// backlight control, display switching, lid
+		#include "acpi/video.asl"
+	}
+
 	#include <cpu/intel/model_6dx/acpi/cpu.asl>
 
 	Scope (\_SB) {
diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c
index b699740b3b..fa69e7a14b 100644
--- a/src/mainboard/lenovo/x200/acpi_tables.c
+++ b/src/mainboard/lenovo/x200/acpi_tables.c
@@ -40,13 +40,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 0; /* Will use default of 0x00000400. */
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index 09bc08f7cf..cb4a021135 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/gm45
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gfx.use_spread_spectrum_clock" = "1"
 	register "gfx.lvds_dual_channel" = "0"
diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl
index 432019275f..5545c94420 100644
--- a/src/mainboard/lenovo/x200/dsdt.asl
+++ b/src/mainboard/lenovo/x200/dsdt.asl
@@ -19,8 +19,8 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define DISPLAY_DEVICE_2_IS_LCD_SCREEN 1
 
diff --git a/src/mainboard/lenovo/x201/acpi_tables.c b/src/mainboard/lenovo/x201/acpi_tables.c
index 5c0d1fd776..2dd9da8b9c 100644
--- a/src/mainboard/lenovo/x201/acpi_tables.c
+++ b/src/mainboard/lenovo/x201/acpi_tables.c
@@ -33,11 +33,4 @@
 
 void acpi_create_gnvs(global_nvs_t * gnvs)
 {
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index f87ab1069c..8e9e0a1d32 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/nehalem
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 
 	# Enable DisplayPort Hotplug with 6ms pulse
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index dab66e4c0a..3f5fe2ec81 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -19,11 +19,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",
diff --git a/src/mainboard/lenovo/x220/acpi_tables.c b/src/mainboard/lenovo/x220/acpi_tables.c
index abb6b31286..75020ff899 100644
--- a/src/mainboard/lenovo/x220/acpi_tables.c
+++ b/src/mainboard/lenovo/x220/acpi_tables.c
@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u1 = 0;
 
 	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 6eb3b1578d..28e240a07c 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl
index fbe1ae7c15..42165a10bd 100644
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",
diff --git a/src/mainboard/lenovo/x230/acpi_tables.c b/src/mainboard/lenovo/x230/acpi_tables.c
index abb6b31286..75020ff899 100644
--- a/src/mainboard/lenovo/x230/acpi_tables.c
+++ b/src/mainboard/lenovo/x230/acpi_tables.c
@@ -52,12 +52,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u1 = 0;
 
 	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	// the lid is open by default.
 	gnvs->lids = 1;
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index c8274e27c1..284af85d39 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl
index 8f5bbc02bf..8c713c7df2 100644
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ b/src/mainboard/lenovo/x230/dsdt.asl
@@ -20,11 +20,10 @@
  */
 
 #define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB
-#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 #define EC_LENOVO_H8_ME_WORKAROUND 1
-#define HAVE_LCD_SCREEN 1
 
 DefinitionBlock(
 	"dsdt.aml",
diff --git a/src/mainboard/lenovo/x60/acpi/video.asl b/src/mainboard/lenovo/x60/acpi/video.asl
deleted file mode 100644
index ffb908c50c..0000000000
--- a/src/mainboard/lenovo/x60/acpi/video.asl
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include "smi.h"
-
-Device (DSPC)
-{
-	Name (_ADR, 0x00020001)
-	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
-	Field (DSPC, ByteAcc, NoLock, Preserve)
-	{
-		Offset (0xf4),
-		       BRTC, 8
-	}
-
-	Method(BRTD, 0, NotSerialized)
-	{
-		Store(BRTC, Local0)
-		if (LGreater (Local0, 15))
-		{
-			Subtract(Local0, 16, Local0)
-			Store(Local0, BRTC)
-			Trap(SMI_SAVE_CMOS)
-		}
-	}
-
-	Method(BRTU, 0, NotSerialized)
-	{
-		Store (BRTC, Local0)
-		if (LLess(Local0, 0xff))
-		{
-			Add (Local0, 16, Local0)
-			Store(Local0, BRTC)
-			Trap(SMI_SAVE_CMOS)
-		}
-	}
-}
diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c
index 64b1fc6bad..4e4cf1e576 100644
--- a/src/mainboard/lenovo/x60/acpi_tables.c
+++ b/src/mainboard/lenovo/x60/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb
index e15f574820..a3d31a6423 100644
--- a/src/mainboard/lenovo/x60/devicetree.cb
+++ b/src/mainboard/lenovo/x60/devicetree.cb
@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_hotplug" = "0x00000220"
 	register "gpu_lvds_use_spread_spectrum_clock" = "1"
diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl
index 92aac6ced7..40e5d05502 100644
--- a/src/mainboard/lenovo/x60/dsdt.asl
+++ b/src/mainboard/lenovo/x60/dsdt.asl
@@ -18,9 +18,11 @@
  * Foundation, Inc.
  */
 
+#include "smi.h"
+
 #define THINKPAD_EC_GPE 28
-#define BRIGHTNESS_UP \DSPC.BRTU
-#define BRIGHTNESS_DOWN \DSPC.BRTD
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
 
 DefinitionBlock(
diff --git a/src/mainboard/packardbell/ms2290/acpi/ec.asl b/src/mainboard/packardbell/ms2290/acpi/ec.asl
index 7a73a78e83..f06aba757d 100644
--- a/src/mainboard/packardbell/ms2290/acpi/ec.asl
+++ b/src/mainboard/packardbell/ms2290/acpi/ec.asl
@@ -121,12 +121,12 @@ Device(EC)
 	/* Decrease brightness.  */
 	Method(_Q1D, 0, NotSerialized)
 	{
-		\_SB.PCI0.GFX0.LCD0.DECB()
+		\_SB.PCI0.GFX0.DECB()
 	}
 	/* Increase brightness.  */
 	Method(_Q1C, 0, NotSerialized)
 	{
-		\_SB.PCI0.GFX0.LCD0.INCB()
+		\_SB.PCI0.GFX0.INCB()
 	}
 
 #include "battery.asl"
diff --git a/src/mainboard/packardbell/ms2290/acpi_tables.c b/src/mainboard/packardbell/ms2290/acpi_tables.c
index 001f488c36..73b9fff1b7 100644
--- a/src/mainboard/packardbell/ms2290/acpi_tables.c
+++ b/src/mainboard/packardbell/ms2290/acpi_tables.c
@@ -33,12 +33,5 @@
 
 void acpi_create_gnvs(global_nvs_t * gnvs)
 {
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index 17e1a4133f..0231b4b3db 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -20,6 +20,9 @@
 ##
 
 chip northbridge/intel/nehalem
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	register "gpu_dp_b_hotplug" = "0x04"
 	register "gpu_dp_c_hotplug" = "0x04"
diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl
index 0911494eb1..5fb43f3899 100644
--- a/src/mainboard/packardbell/ms2290/dsdt.asl
+++ b/src/mainboard/packardbell/ms2290/dsdt.asl
@@ -18,8 +18,6 @@
  * Foundation, Inc.
  */
 
-#define HAVE_LCD_SCREEN 1
-
 DefinitionBlock(
 	"dsdt.aml",
 	"DSDT",
diff --git a/src/mainboard/roda/rk886ex/acpi/ec.asl b/src/mainboard/roda/rk886ex/acpi/ec.asl
index fa13bbfaa3..d033f46552 100644
--- a/src/mainboard/roda/rk886ex/acpi/ec.asl
+++ b/src/mainboard/roda/rk886ex/acpi/ec.asl
@@ -97,8 +97,8 @@ Device(EC0)
 	Method (_Q12, 0)
 	{
 		Store("_Q12: Fn-F9 (Display Switch) pressed", Debug)
+		Notify (\_SB.PCI0.GFX0, 0x82)
 		// Store(1, TLST)
-		// HKDS(10)
 	}
 
 	Method (_Q30, 0)
diff --git a/src/mainboard/roda/rk886ex/acpi/video.asl b/src/mainboard/roda/rk886ex/acpi/video.asl
deleted file mode 100644
index 1c9ccfde60..0000000000
--- a/src/mainboard/roda/rk886ex/acpi/video.asl
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
-
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
-
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c
index 64b1fc6bad..4e4cf1e576 100644
--- a/src/mainboard/roda/rk886ex/acpi_tables.c
+++ b/src/mainboard/roda/rk886ex/acpi_tables.c
@@ -36,13 +36,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index a4ed87b437..589abedc9e 100644
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -19,6 +19,9 @@
 ##
 
 chip northbridge/intel/i945
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
         device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478
diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c
index b699740b3b..fa69e7a14b 100644
--- a/src/mainboard/roda/rk9/acpi_tables.c
+++ b/src/mainboard/roda/rk9/acpi_tables.c
@@ -40,13 +40,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->cmap = 0x01;
 	gnvs->cmbp = 0x01;
 
-	/* IGD Displays */
-	gnvs->ndid = 0; /* Will use default of 0x00000400. */
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 }
 
 unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index 2bd2358e6b..003c08eb86 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/gm45
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_BGA956
 			device lapic 0 on end
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c
index 8271fc7a55..0e79348000 100644
--- a/src/mainboard/samsung/lumpy/acpi_tables.c
+++ b/src/mainboard/samsung/lumpy/acpi_tables.c
@@ -80,13 +80,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 0;
 	gnvs->s5u1 = 0;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	acpi_update_thermal_table(gnvs);
 
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 03726141fb..a632b271ea 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c
index 81eadd5db5..04e3bd0fb6 100644
--- a/src/mainboard/samsung/stumpy/acpi_tables.c
+++ b/src/mainboard/samsung/stumpy/acpi_tables.c
@@ -79,13 +79,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
 	gnvs->s5u0 = 1;
 	gnvs->s5u1 = 1;
 
-	/* IGD Displays */
-	gnvs->ndid = 3;
-	gnvs->did[0] = 0x80000100;
-	gnvs->did[1] = 0x80000240;
-	gnvs->did[2] = 0x80000410;
-	gnvs->did[3] = 0x80000410;
-	gnvs->did[4] = 0x00000005;
 
 	acpi_update_thermal_table(gnvs);
 
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index 60b112b5d1..df91a7241d 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -1,4 +1,7 @@
 chip northbridge/intel/sandybridge
+	# IGD Displays
+	register "gfx.ndid" = "3"
+	register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
 
 	# Enable DisplayPort 1 Hotplug with 6ms pulse
 	register "gpu_dp_d_hotplug" = "0x06"
diff --git a/src/northbridge/intel/fsp_sandybridge/Kconfig b/src/northbridge/intel/fsp_sandybridge/Kconfig
index dae2780bef..21d3f65ce8 100644
--- a/src/northbridge/intel/fsp_sandybridge/Kconfig
+++ b/src/northbridge/intel/fsp_sandybridge/Kconfig
@@ -21,10 +21,12 @@
 config NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
 	bool
 	select CPU_INTEL_FSP_MODEL_206AX
+	select INTEL_GMA_ACPI
 
 config NORTHBRIDGE_INTEL_FSP_IVYBRIDGE
 	bool
 	select CPU_INTEL_FSP_MODEL_306AX
+	select INTEL_GMA_ACPI
 
 if NORTHBRIDGE_INTEL_FSP_IVYBRIDGE || NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
 
diff --git a/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl b/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
index 8ad70d7968..df8a389797 100644
--- a/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
+++ b/src/northbridge/intel/fsp_sandybridge/acpi/igd.asl
@@ -22,301 +22,57 @@ Device (GFX0)
 {
 	Name (_ADR, 0x00020000)
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
+		Offset (0x10),
+		BAR0, 64
 	}
 
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
+	OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+	Field (GFRG, DWordAcc, NoLock, Preserve)
 	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
-	}
-
-	Device(DD01)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Offset (0x48254),
+			BCLV, 16,
+		Offset (0xc8250),
+			CR1, 32,
+			CR2, 32
 	}
 
-
-	Device(DD03)
+	Name (BRIG, Package (0x12)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x061a061a, CR2)
 	}
 
-
-	Device(DD05)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
-
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/fsp_sandybridge/chip.h b/src/northbridge/intel/fsp_sandybridge/chip.h
index 75d967e66e..6e823dc986 100644
--- a/src/northbridge/intel/fsp_sandybridge/chip.h
+++ b/src/northbridge/intel/fsp_sandybridge/chip.h
@@ -17,6 +17,8 @@
  * Foundation, Inc.
  */
 
+#include <drivers/intel/gma/i915.h>
+
 /*
  * Digital Port Hotplug Enable:
  *  0x04 = Enabled, 2ms short pulse
@@ -38,4 +40,6 @@ struct northbridge_intel_fsp_sandybridge_config {
 
 	u32 gpu_cpu_backlight;	/* CPU Backlight PWM value */
 	u32 gpu_pch_backlight;	/* PCH Backlight PWM value */
+
+	struct i915_gpu_controller_info gfx;
 };
diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c
index e86c47850c..26f1ae6789 100644
--- a/src/northbridge/intel/fsp_sandybridge/gma.c
+++ b/src/northbridge/intel/fsp_sandybridge/gma.c
@@ -63,6 +63,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_fsp_sandybridge_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
@@ -71,6 +92,7 @@ static struct device_operations gma_func0_ops = {
 	.read_resources		= pci_dev_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.init			= pci_dev_init,
 	.scan_bus		= 0,
 	.enable			= 0,
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index add8c4ad89..9564ea6efe 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -30,6 +30,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select IOMMU
 	select VGA
 	select INTEL_EDID
+	select INTEL_GMA_ACPI
 
 config BOOTBLOCK_NORTHBRIDGE_INIT
 	string
diff --git a/src/northbridge/intel/gm45/acpi/igd.asl b/src/northbridge/intel/gm45/acpi/igd.asl
index cb9969419f..696cc2b2d6 100644
--- a/src/northbridge/intel/gm45/acpi/igd.asl
+++ b/src/northbridge/intel/gm45/acpi/igd.asl
@@ -26,10 +26,10 @@ Device (GFX0)
 	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{
 		Offset (0x10),
-			BAR0, 64
+		BAR0, 64
 	}
 
-	OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
+	OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
 	Field (GFRG, DWordAcc, NoLock, Preserve)
 	{
 		Offset (0x61250),
@@ -38,399 +38,40 @@ Device (GFX0)
 			BCLM, 16,
 	}
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	Name (BRIG, Package (0x12)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
-	}
-
-	/* We try to support as many GM45 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
-	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD3, 0))
-			Store (Or(0x00010000, DID2), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD4, 0))
-			Store (Or(0x00010000, DID2), Index(DOD4, 1))
-			Store (Or(0x00010000, DID3), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD5, 0))
-			Store (Or(0x00010000, DID2), Index(DOD5, 1))
-			Store (Or(0x00010000, DID3), Index(DOD5, 2))
-			Store (Or(0x00010000, DID4), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
-	}
-
-	Device(DD01)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-#ifdef DISPLAY_DEVICE_2_IS_LCD_SCREEN
-	Device (LCD0)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		Name (BRCT, 0)
-
-		Name (BRIG, Package (0x12)
-		{
-			0x61,
-			0x61,
-			0x2,
-			0x4,
-			0x5,
-			0x7,
-			0x9,
-			0xb,
-			0xd,
-			0x11,
-			0x14,
-			0x17,
-			0x1c,
-			0x20,
-			0x27,
-			0x31,
-			0x41,
-			0x61,
-		})
-
-		Method (_BCL, 0, NotSerialized)
-		{
-			Store (1, BRCT)
-			Return (BRIG)
-		}
-
-		Method (_BCM, 1, NotSerialized)
-		{
-			Store (ShiftLeft (Arg0, 4), ^^BCLV)
-			Store (0x80000000, ^^CR1)
-			Store (0x0610, ^^BCLM)
-		}
-		Method (_BQC, 0, NotSerialized)
-		{
-			Store (^^BCLV, Local0)
-			ShiftRight (Local0, 4, Local0)
-			Return (Local0)
-		}
-
-		Method(BRID, 1, NotSerialized)
-		{
-			Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
-			If (LEqual (Local0, Ones))
-			{
-				Return (0x11)
-			}
-			Return (Local0)
-		}
-
-		/* Using Notify is the right way. But Windows doesn't handle
-		   it well. So use both method in a way to avoid double action.
-		 */
-		Method (DECB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x87)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 2))
-				{
-					Decrement (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
-		Method (INCB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x86)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 0x11))
-				{
-					Increment (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
-	}
-#else
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-#endif
-
-	Device(DD03)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x0610, BCLM)
 	}
 
-
-	Device(DD05)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c
index fab7787cb1..7cc59c8efa 100644
--- a/src/northbridge/intel/gm45/gma.c
+++ b/src/northbridge/intel/gm45/gma.c
@@ -491,6 +491,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_gm45_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem = gma_set_subsystem,
 };
@@ -499,6 +520,7 @@ static struct device_operations gma_func0_ops = {
 	.read_resources = pci_dev_read_resources,
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.init = gma_func0_init,
 	.scan_bus = 0,
 	.enable = 0,
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index f04b5c3cc2..e51ac3cf09 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -26,6 +26,7 @@ config NORTHBRIDGE_INTEL_HASWELL
 	select MMCONF_SUPPORT_DEFAULT
 	select INTEL_DDI
 	select INTEL_DP
+	select INTEL_GMA_ACPI
 
 if NORTHBRIDGE_INTEL_HASWELL
 
diff --git a/src/northbridge/intel/haswell/acpi/igd.asl b/src/northbridge/intel/haswell/acpi/igd.asl
index 8ad70d7968..df8a389797 100644
--- a/src/northbridge/intel/haswell/acpi/igd.asl
+++ b/src/northbridge/intel/haswell/acpi/igd.asl
@@ -22,301 +22,57 @@ Device (GFX0)
 {
 	Name (_ADR, 0x00020000)
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
+		Offset (0x10),
+		BAR0, 64
 	}
 
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
+	OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+	Field (GFRG, DWordAcc, NoLock, Preserve)
 	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
-	}
-
-	Device(DD01)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Offset (0x48254),
+			BCLV, 16,
+		Offset (0xc8250),
+			CR1, 32,
+			CR2, 32
 	}
 
-
-	Device(DD03)
+	Name (BRIG, Package (0x12)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x061a061a, CR2)
 	}
 
-
-	Device(DD05)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
-
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index 801e062f72..6ae348394d 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -17,6 +17,8 @@
  * Foundation, Inc.
  */
 
+#include <drivers/intel/gma/i915.h>
+
 /*
  * Digital Port Hotplug Enable:
  *  0x04 = Enabled, 2ms short pulse
@@ -38,6 +40,8 @@ struct northbridge_intel_haswell_config {
 
 	u32 gpu_cpu_backlight;	/* CPU Backlight PWM value */
 	u32 gpu_pch_backlight;	/* PCH Backlight PWM value */
+
+	struct i915_gpu_controller_info gfx;
 };
 
 extern struct chip_operations northbridge_intel_haswell_ops;
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 6faae2526a..f120670ebc 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -487,6 +487,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_haswell_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
@@ -496,6 +517,7 @@ static struct device_operations gma_func0_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= gma_func0_init,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.scan_bus		= 0,
 	.enable			= 0,
 	.ops_pci		= &gma_pci_ops,
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index a592666918..b17dda6901 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -29,6 +29,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select HAVE_DEBUG_RAM_SETUP
 	select LAPIC_MONOTONIC_TIMER
 	select VGA
+	select INTEL_GMA_ACPI
 
 config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
 	def_bool n
diff --git a/src/northbridge/intel/i945/acpi/i945.asl b/src/northbridge/intel/i945/acpi/i945.asl
index 74302c93de..2a4eb9fd6e 100644
--- a/src/northbridge/intel/i945/acpi/i945.asl
+++ b/src/northbridge/intel/i945/acpi/i945.asl
@@ -99,9 +99,3 @@ Device (PDRC)
 
 // Integrated graphics 0:2.0
 #include "igd.asl"
-
-Scope (\)
-{
-	// backlight control, display switching, lid
-	#include "acpi/video.asl"
-}
diff --git a/src/northbridge/intel/i945/acpi/igd.asl b/src/northbridge/intel/i945/acpi/igd.asl
index 8ad70d7968..fb89e55a92 100644
--- a/src/northbridge/intel/i945/acpi/igd.asl
+++ b/src/northbridge/intel/i945/acpi/igd.asl
@@ -22,301 +22,52 @@ Device (GFX0)
 {
 	Name (_ADR, 0x00020000)
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	Name (BRIG, Package (0x12)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
-	}
-
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
-	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
-	}
-
-	Device(DD01)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD03)
+		0xf,
+		0xf,
+		0x0,
+		0x1,
+		0x2,
+		0x3,
+		0x4,
+		0x5,
+		0x6,
+		0x7,
+		0x8,
+		0x9,
+		0xa,
+		0xb,
+		0xc,
+		0xd,
+		0xe,
+		0xf,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (Or(ShiftLeft (Arg0, 4), 0xf), ^^DSPC.BRTC)
+#ifdef SMI_SAVE_CMOS
+		Trap(SMI_SAVE_CMOS)
+#endif
 	}
 
-
-	Device(DD04)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (^^DSPC.BRTC, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
+#include <drivers/intel/gma/igd.asl>
+}
 
-
-	Device(DD05)
+Device (DSPC)
+{
+	Name (_ADR, 0x00020001)
+	OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
+	Field (DSPC, ByteAcc, NoLock, Preserve)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Offset (0xf4),
+		       BRTC, 8
 	}
-
-}
+}
\ No newline at end of file
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
index 9e25ecc95c..57060869e4 100644
--- a/src/northbridge/intel/i945/chip.h
+++ b/src/northbridge/intel/i945/chip.h
@@ -1,6 +1,9 @@
+#include <drivers/intel/gma/i915.h>
+
 struct northbridge_intel_i945_config {
 	u32 gpu_hotplug;
 	u32 gpu_backlight;
 	int gpu_lvds_use_spread_spectrum_clock;
 	int gpu_lvds_is_dual_channel;
+	struct i915_gpu_controller_info gfx;
 };
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index ebc2f1c42d..28f611fcb2 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -488,6 +488,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_i945_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
@@ -497,6 +518,7 @@ static struct device_operations gma_func0_ops = {
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
 	.init			= gma_func0_init,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.scan_bus		= 0,
 	.enable			= 0,
 	.disable		= gma_func0_disable,
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index 6646bb1ade..17c94b61a9 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -25,6 +25,7 @@ config NORTHBRIDGE_INTEL_NEHALEM
 	select VGA
 	select INTEL_EDID
 	select TSC_MONOTONIC_TIMER
+	select INTEL_GMA_ACPI
 
 if NORTHBRIDGE_INTEL_NEHALEM
 
diff --git a/src/northbridge/intel/nehalem/acpi/igd.asl b/src/northbridge/intel/nehalem/acpi/igd.asl
index 6c9959d7a1..df8a389797 100644
--- a/src/northbridge/intel/nehalem/acpi/igd.asl
+++ b/src/northbridge/intel/nehalem/acpi/igd.asl
@@ -26,10 +26,10 @@ Device (GFX0)
 	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{
 		Offset (0x10),
-			BAR0, 64
+		BAR0, 64
 	}
 
-	OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
+	OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
 	Field (GFRG, DWordAcc, NoLock, Preserve)
 	{
 		Offset (0x48254),
@@ -39,391 +39,40 @@ Device (GFX0)
 			CR2, 32
 	}
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	Name (BRIG, Package (0x12)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
-	}
-
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x061a061a, CR2)
 	}
 
-	Device(DD01)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD03)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD05)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-#ifdef HAVE_LCD_SCREEN
-	Device (LCD0)
-	{
-		Name (_ADR, 0x0400)
-		Name (BRCT, 0)
-
-		Name (BRIG, Package (0x12)
-		{
-			0x61,
-			0x61,
-			0x2,
-			0x4,
-			0x5,
-			0x7,
-			0x9,
-			0xb,
-			0xd,
-			0x11,
-			0x14,
-			0x17,
-			0x1c,
-			0x20,
-			0x27,
-			0x31,
-			0x41,
-			0x61,
-		})
-
-		Method (_BCL, 0, NotSerialized)
-		{
-			Store (1, BRCT)
-			Return (BRIG)
-		}
-
-		Method (_BCM, 1, NotSerialized)
-		{
-			Store (ShiftLeft (Arg0, 4), ^^BCLV)
-			Store (0x80000000, ^^CR1)
-			Store (0x061a061a, ^^CR2)
-		}
-		Method (_BQC, 0, NotSerialized)
-		{
-			Store (^^BCLV, Local0)
-			ShiftRight (Local0, 4, Local0)
-			Return (Local0)
-		}
-
-		Method(BRID, 1, NotSerialized)
-		{
-			Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
-			If (LEqual (Local0, Ones))
-			{
-				Return (0x11)
-			}
-			Return (Local0)
-		}
-
-		/* Using Notify is the right way. But Windows doesn't handle
-		   it well. So use both method in a way to avoid double action.
-		 */
-		Method (DECB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x87)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 2))
-				{
-					Decrement (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
-		Method (INCB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x86)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 0x11))
-				{
-					Increment (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
-#endif
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index 2c1332c3bd..d4217de0cf 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -1071,6 +1071,27 @@ static void gma_read_resources(struct device *dev)
 	res->size = (resource_t) 0x10000000;
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_nehalem_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem = gma_set_subsystem,
 };
@@ -1079,6 +1100,7 @@ static struct device_operations gma_func0_ops = {
 	.read_resources = gma_read_resources,
 	.set_resources = pci_dev_set_resources,
 	.enable_resources = pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.init = gma_func0_init,
 	.scan_bus = 0,
 	.enable = 0,
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index e3066423e8..7eb6948d47 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -23,6 +23,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
 	select CPU_INTEL_MODEL_206AX
+	select INTEL_GMA_ACPI
 
 config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
 	bool
@@ -31,6 +32,7 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
 	select MMCONF_SUPPORT_DEFAULT
 	select CPU_INTEL_MODEL_206AX
 	select HAVE_DEBUG_RAM_SETUP
+	select INTEL_GMA_ACPI
 
 config NORTHBRIDGE_INTEL_IVYBRIDGE
 	bool
@@ -38,6 +40,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
 	select CPU_INTEL_MODEL_306AX
+	select INTEL_GMA_ACPI
 
 config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
 	bool
@@ -46,6 +49,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
 	select MMCONF_SUPPORT_DEFAULT
 	select CPU_INTEL_MODEL_306AX
 	select HAVE_DEBUG_RAM_SETUP
+	select INTEL_GMA_ACPI
 
 if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE || NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
 
diff --git a/src/northbridge/intel/sandybridge/acpi/igd.asl b/src/northbridge/intel/sandybridge/acpi/igd.asl
index 6c9959d7a1..6b02765bf0 100644
--- a/src/northbridge/intel/sandybridge/acpi/igd.asl
+++ b/src/northbridge/intel/sandybridge/acpi/igd.asl
@@ -39,391 +39,40 @@ Device (GFX0)
 			CR2, 32
 	}
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	Name (BRIG, Package (0x12)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
-	}
-
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x061a061a, CR2)
 	}
 
-	Device(DD01)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD03)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD05)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-#ifdef HAVE_LCD_SCREEN
-	Device (LCD0)
-	{
-		Name (_ADR, 0x0400)
-		Name (BRCT, 0)
-
-		Name (BRIG, Package (0x12)
-		{
-			0x61,
-			0x61,
-			0x2,
-			0x4,
-			0x5,
-			0x7,
-			0x9,
-			0xb,
-			0xd,
-			0x11,
-			0x14,
-			0x17,
-			0x1c,
-			0x20,
-			0x27,
-			0x31,
-			0x41,
-			0x61,
-		})
-
-		Method (_BCL, 0, NotSerialized)
-		{
-			Store (1, BRCT)
-			Return (BRIG)
-		}
-
-		Method (_BCM, 1, NotSerialized)
-		{
-			Store (ShiftLeft (Arg0, 4), ^^BCLV)
-			Store (0x80000000, ^^CR1)
-			Store (0x061a061a, ^^CR2)
-		}
-		Method (_BQC, 0, NotSerialized)
-		{
-			Store (^^BCLV, Local0)
-			ShiftRight (Local0, 4, Local0)
-			Return (Local0)
-		}
-
-		Method(BRID, 1, NotSerialized)
-		{
-			Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 2), Local0)
-			If (LEqual (Local0, Ones))
-			{
-				Return (0x11)
-			}
-			Return (Local0)
-		}
-
-		/* Using Notify is the right way. But Windows doesn't handle
-		   it well. So use both method in a way to avoid double action.
-		 */
-		Method (DECB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x87)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 2))
-				{
-					Decrement (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
-		Method (INCB, 0, NotSerialized)
-		{
-			If (BRCT)
-			{
-				Notify (LCD0, 0x86)
-			} Else {
-				Store (BRID (_BQC ()), Local0)
-				If (LNotEqual (Local0, 0x11))
-				{
-					Increment (Local0)
-				}
-				_BCM (DerefOf (Index (BRIG, Local0)))
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
-#endif
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 7ff0e65096..d7ad8febb1 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -613,6 +613,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_sandybridge_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
@@ -621,6 +642,7 @@ static struct device_operations gma_func0_ops = {
 	.read_resources		= pci_dev_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.init			= gma_func0_init,
 	.scan_bus		= 0,
 	.enable			= 0,
diff --git a/src/northbridge/intel/sch/Kconfig b/src/northbridge/intel/sch/Kconfig
index 548416e5ab..cf962328b8 100644
--- a/src/northbridge/intel/sch/Kconfig
+++ b/src/northbridge/intel/sch/Kconfig
@@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_SCH
 	bool
 	select MMCONF_SUPPORT
 	select LATE_CBMEM_INIT
+	select INTEL_GMA_ACPI
 
 if NORTHBRIDGE_INTEL_SCH
 
diff --git a/src/northbridge/intel/sch/acpi/igd.asl b/src/northbridge/intel/sch/acpi/igd.asl
index 8ad70d7968..696cc2b2d6 100644
--- a/src/northbridge/intel/sch/acpi/igd.asl
+++ b/src/northbridge/intel/sch/acpi/igd.asl
@@ -22,301 +22,56 @@ Device (GFX0)
 {
 	Name (_ADR, 0x00020000)
 
-	/* Display Output Switching */
-	Method (_DOS, 1)
+	OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{
-		/* Windows 2000 and Windows XP call _DOS to enable/disable
-		 * Display Output Switching during init and while a switch
-		 * is already active
-		 */
-		Store (And(Arg0, 7), DSEN)
+		Offset (0x10),
+		BAR0, 64
 	}
 
-	/* We try to support as many i945 systems as possible,
-	 * so keep the number of DIDs flexible.
-	 */
-	Method (_DOD, 0)
+	OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000)
+	Field (GFRG, DWordAcc, NoLock, Preserve)
 	{
-		If (LEqual(NDID, 1)) {
-			Name(DOD1, Package() {
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID1), Index(DOD1, 0))
-			Return(DOD1)
-		}
-
-		If (LEqual(NDID, 2)) {
-			Name(DOD2, Package() {
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID2), Index(DOD2, 0))
-			Store (Or(0x00010000, DID2), Index(DOD2, 1))
-			Return(DOD2)
-		}
-
-		If (LEqual(NDID, 3)) {
-			Name(DOD3, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID3), Index(DOD3, 0))
-			Store (Or(0x00010000, DID3), Index(DOD3, 1))
-			Store (Or(0x00010000, DID3), Index(DOD3, 2))
-			Return(DOD3)
-		}
-
-		If (LEqual(NDID, 4)) {
-			Name(DOD4, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID4), Index(DOD4, 0))
-			Store (Or(0x00010000, DID4), Index(DOD4, 1))
-			Store (Or(0x00010000, DID4), Index(DOD4, 2))
-			Store (Or(0x00010000, DID4), Index(DOD4, 3))
-			Return(DOD4)
-		}
-
-		If (LGreater(NDID, 4)) {
-			Name(DOD5, Package() {
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff,
-				0xffffffff
-			})
-			Store (Or(0x00010000, DID5), Index(DOD5, 0))
-			Store (Or(0x00010000, DID5), Index(DOD5, 1))
-			Store (Or(0x00010000, DID5), Index(DOD5, 2))
-			Store (Or(0x00010000, DID5), Index(DOD5, 3))
-			Store (Or(0x00010000, DID5), Index(DOD5, 4))
-			Return(DOD5)
-		}
-
-		/* Some error happened, but we have to return something */
-		Return (Package() {0x00000400})
-	}
-
-	Device(DD01)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID1, 0)) {
-				Return (1)
-			} Else {
-				Return (And(0xffff, DID1))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 1)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 1)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-	Device(DD02)
-	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID2, 0)) {
-				Return (2)
-			} Else {
-				Return (And(0xffff, DID2))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 2)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 2)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Offset (0x61250),
+			CR1, 32,
+			BCLV, 16,
+			BCLM, 16,
 	}
 
-
-	Device(DD03)
+	Name (BRIG, Package (0x12)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID3, 0)) {
-				Return (3)
-			} Else {
-				Return (And(0xffff, DID3))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 4)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
-	}
-
-
-	Device(DD04)
+		0x61,
+		0x61,
+		0x2,
+		0x4,
+		0x5,
+		0x7,
+		0x9,
+		0xb,
+		0xd,
+		0x11,
+		0x14,
+		0x17,
+		0x1c,
+		0x20,
+		0x27,
+		0x31,
+		0x41,
+		0x61,
+	})
+
+	Method (XBCM, 1, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID4, 0)) {
-				Return (4)
-			} Else {
-				Return (And(0xffff, DID4))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 8)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (ShiftLeft (Arg0, 4), BCLV)
+		Store (0x80000000, CR1)
+		Store (0x0610, BCLM)
 	}
 
-
-	Device(DD05)
+	Method (XBQC, 0, NotSerialized)
 	{
-		/* Device Unique ID */
-		Method(_ADR, 0, Serialized)
-		{
-			If(LEqual(DID5, 0)) {
-				Return (5)
-			} Else {
-				Return (And(0xffff, DID5))
-			}
-		}
-
-		/* Device Current Status */
-		Method(_DCS, 0)
-		{
-			TRAP(1)
-			If (And(CSTE, 16)) {
-				Return (0x1f)
-			}
-			Return(0x1d)
-		}
-
-		/* Query Device Graphics State */
-		Method(_DGS, 0)
-		{
-			If (And(NSTE, 4)) {
-				Return(1)
-			}
-			Return(0)
-		}
-
-		/* Device Set State */
-		Method(_DSS, 1)
-		{
-			/* If Parameter Arg0 is (1 << 31) | (1 << 30), the
-			 * display switch was completed
-			 */
-			If (LEqual(And(Arg0, 0xc0000000), 0xc0000000)) {
-				Store (NSTE, CSTE)
-			}
-		}
+		Store (BCLV, Local0)
+		ShiftRight (Local0, 4, Local0)
+		Return (Local0)
 	}
-
+#include <drivers/intel/gma/igd.asl>
 }
diff --git a/src/northbridge/intel/sch/acpi/sch.asl b/src/northbridge/intel/sch/acpi/sch.asl
index 42b9f97db2..162232f7c5 100644
--- a/src/northbridge/intel/sch/acpi/sch.asl
+++ b/src/northbridge/intel/sch/acpi/sch.asl
@@ -79,9 +79,3 @@ Device (PDRC)
 
 // Integrated graphics 0:2.0
 #include "igd.asl"
-
-Scope (\)
-{
-	// backlight control, display switching, lid
-	#include "acpi/video.asl"
-}
diff --git a/src/mainboard/kontron/986lcd-m/acpi/video.asl b/src/northbridge/intel/sch/chip.h
index e4f764c620..33df6c56f2 100644
--- a/src/mainboard/kontron/986lcd-m/acpi/video.asl
+++ b/src/northbridge/intel/sch/chip.h
@@ -1,7 +1,8 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2007-2008 coresystems GmbH
+ *               2012 secunet Security Networks AG
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -17,26 +18,13 @@
  * Foundation, Inc.
  */
 
-// Brightness write
-Method (BRTW, 1, Serialized)
-{
-	// TODO
-}
+#ifndef NORTHBRIDGE_INTEL_SCH_CHIP_H
+#define NORTHBRIDGE_INTEL_SCH_CHIP_H
 
-// Hot Key Display Switch
-Method (HKDS, 1, Serialized)
-{
-	// TODO
-}
+#include <drivers/intel/gma/i915.h>
 
-// Lid Switch Display Switch
-Method (LSDS, 1, Serialized)
-{
-	// TODO
-}
+struct northbridge_intel_sch_config {
+	struct i915_gpu_controller_info gfx;
+};
 
-// Brightness Notification
-Method(BRTN,1,Serialized)
-{
-	// TODO (no displays defined yet)
-}
+#endif				/* NORTHBRIDGE_INTEL_SCH_CHIP_H */
diff --git a/src/northbridge/intel/sch/gma.c b/src/northbridge/intel/sch/gma.c
index 5728d19f10..5540eb1e3d 100644
--- a/src/northbridge/intel/sch/gma.c
+++ b/src/northbridge/intel/sch/gma.c
@@ -21,6 +21,8 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <drivers/intel/gma/i915.h>
+#include "chip.h"
 
 static void gma_func0_init(struct device *dev)
 {
@@ -44,6 +46,27 @@ static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)
 	}
 }
 
+const struct i915_gpu_controller_info *
+intel_gma_get_controller_info(void)
+{
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));
+	if (!dev) {
+		return NULL;
+	}
+	struct northbridge_intel_sch_config *chip = dev->chip_info;
+	return &chip->gfx;
+}
+
+static void gma_ssdt(void)
+{
+	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+	if (!gfx) {
+		return;
+	}
+
+	drivers_intel_gma_displays_ssdt_generate(gfx);
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem = gma_set_subsystem,
 };
@@ -52,6 +75,7 @@ static struct device_operations gma_func0_ops = {
 	.read_resources		= pci_dev_read_resources,
 	.set_resources		= pci_dev_set_resources,
 	.enable_resources	= pci_dev_enable_resources,
+	.acpi_fill_ssdt_generator = gma_ssdt,
 	.init			= gma_func0_init,
 	.scan_bus		= 0,
 	.enable			= 0,
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 0ecd3895ce..19e540738c 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -678,6 +678,7 @@ static void southbridge_inject_dsdt(void)
 	opregion = igd_make_opregion();
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 		memset(gnvs, 0, sizeof (*gnvs));
 
 		acpi_create_gnvs(gnvs);
@@ -686,6 +687,9 @@ static void southbridge_inject_dsdt(void)
 		gnvs->mpen = 1; /* Enable Multi Processing */
 		gnvs->pcnt = dev_count_cpu();
 
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 #if CONFIG_CHROMEOS
 		chromeos_init_vboot(&(gnvs->chromeos));
 #endif
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index e707afac20..73e11e80a6 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -640,11 +640,17 @@ static void southbridge_inject_dsdt(void)
 	opregion = igd_make_opregion();
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
 		memset(gnvs, 0, sizeof (*gnvs));
 
 		acpi_create_gnvs(gnvs);
 		/* IGD OpRegion Base Address */
 		gnvs->aslb = (u32)opregion;
+
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 		/* And tell SMI about it */
 		smm_setup_structures(gnvs, NULL, NULL);
 
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index ccaabbaaa3..31ea130b51 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -34,6 +34,7 @@
 #include <arch/acpigen.h>
 #include <cbmem.h>
 #include <string.h>
+#include <drivers/intel/gma/i915.h>
 #include "nvs.h"
 
 #define NMI_OFF	0
@@ -617,12 +618,18 @@ static void southbridge_inject_dsdt(void)
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
 		memset(gnvs, 0, sizeof(*gnvs));
 
 		gnvs->apic = 1;
 		gnvs->mpen = 1; /* Enable Multi Processing */
 
 		acpi_create_gnvs(gnvs);
+
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 		/* And tell SMI about it */
 		smm_setup_structures(gnvs, NULL, NULL);
 
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index de936a3630..3cc053b19f 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -37,6 +37,7 @@
 #include "i82801ix.h"
 #include "nvs.h"
 #include <southbridge/intel/common/pciehp.h>
+#include <drivers/intel/gma/i915.h>
 
 #define NMI_OFF	0
 
@@ -544,8 +545,13 @@ static void southbridge_inject_dsdt(void)
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 		memset(gnvs, 0, sizeof (*gnvs));
 		acpi_create_gnvs(gnvs);
+
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 		/* And tell SMI about it */
 		smm_setup_structures(gnvs, NULL, NULL);
 
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index c33f9d948b..550ef30a30 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -671,6 +671,7 @@ static void southbridge_inject_dsdt(void)
 	opregion = igd_make_opregion();
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 		memset(gnvs, 0, sizeof (*gnvs));
 
 		acpi_create_gnvs(gnvs);
@@ -678,6 +679,8 @@ static void southbridge_inject_dsdt(void)
 		gnvs->apic = 1;
 		gnvs->mpen = 1;		/* Enable Multi Processing */
 		gnvs->pcnt = dev_count_cpu();
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
 
 		/* IGD OpRegion Base Address */
 		gnvs->aslb = (u32)opregion;
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 6b2a522004..c055da5733 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -38,6 +38,7 @@
 #include "pch.h"
 #include <arch/acpigen.h>
 #include <cbmem.h>
+#include <drivers/intel/gma/i915.h>
 
 #define NMI_OFF	0
 
@@ -755,6 +756,8 @@ static void southbridge_inject_dsdt(void)
 	}
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
+
 		acpi_create_gnvs(gnvs);
 
 		gnvs->apic = 1;
@@ -768,6 +771,9 @@ static void southbridge_inject_dsdt(void)
 		/* Update the mem console pointer. */
 		gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE);
 
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 		acpi_save_gnvs((unsigned long)gnvs);
 		/* And tell SMI about it */
 		smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c
index f06c149b3d..e40b051361 100644
--- a/src/southbridge/intel/sch/lpc.c
+++ b/src/southbridge/intel/sch/lpc.c
@@ -29,6 +29,7 @@
 #include <cpu/cpu.h>
 #include <cbmem.h>
 #include <string.h>
+#include <drivers/intel/gma/i915.h>
 #include "nvs.h"
 #include "chip.h"
 
@@ -193,8 +194,13 @@ static void southbridge_inject_dsdt(void)
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
 
 	if (gnvs) {
+		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 		memset(gnvs, 0, sizeof(*gnvs));
 		acpi_create_gnvs(gnvs);
+
+		gnvs->ndid = gfx->ndid;
+		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
+
 		/* And tell SMI about it */
 		smm_setup_structures(gnvs, NULL, NULL);