diff options
author | Martin Roth <martinroth@google.com> | 2017-12-09 10:40:45 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-12-11 17:31:42 +0000 |
commit | bc5c3e75a422befd7335a530f7f041e986ff0977 (patch) | |
tree | 0948beacc4d79e1ed3220aead5224260b2e6d427 /src | |
parent | fbfe654c06f947b61633c519458ed63f6c3904b7 (diff) |
soc/amd/common: Collect timestamps before and after AGESA calls
BUG=b:70432544
TEST=Build & boot kahlee. Look at timestamps.
Change-Id: I8209160f8e23ab77987f8e515c7b00d94f68c8be
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/common/agesawrapper.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/amd/common/agesawrapper.c b/src/soc/amd/common/agesawrapper.c index ec76b4d35c..2164a03843 100644 --- a/src/soc/amd/common/agesawrapper.c +++ b/src/soc/amd/common/agesawrapper.c @@ -21,6 +21,7 @@ #include <cpu/x86/mtrr.h> #include <BiosCallOuts.h> #include <string.h> +#include <timestamp.h> void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {} void __attribute__((weak)) OemPostParams(AMD_POST_PARAMS *PostParams) {} @@ -63,7 +64,10 @@ AGESA_STATUS agesawrapper_amdinitreset(void) AmdResetParams.FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3)); AmdResetParams.FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3); + timestamp_add_now(TS_AGESA_INIT_RESET_START); status = AmdInitReset(&AmdResetParams); + timestamp_add_now(TS_AGESA_INIT_RESET_DONE); + if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); return status; @@ -89,7 +93,10 @@ AGESA_STATUS agesawrapper_amdinitearly(void) OemCustomizeInitEarly (AmdEarlyParamsPtr); AmdEarlyParamsPtr->GnbConfig.PsppPolicy = PsppDisabled; + + timestamp_add_now(TS_AGESA_INIT_EARLY_START); status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr); + timestamp_add_now(TS_AGESA_INIT_EARLY_DONE); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); @@ -128,7 +135,9 @@ AGESA_STATUS agesawrapper_amdinitpost(void) "unknown" ); + timestamp_add_now(TS_AGESA_INIT_POST_START); status = AmdInitPost (PostParams); + timestamp_add_now(TS_AGESA_INIT_POST_DONE); /* If UMA is enabled we currently have it below TOP_MEM as well. * UMA may or may not be cacheable, so Sub4GCacheTop could be @@ -190,7 +199,10 @@ AGESA_STATUS agesawrapper_amdinitenv(void) EnvParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3); EnvParam->GnbEnvConfiguration.IommuSupport = FALSE; + timestamp_add_now(TS_AGESA_INIT_ENV_START); status = AmdInitEnv (EnvParam); + timestamp_add_now(TS_AGESA_INIT_ENV_DONE); + if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(EnvParam->StdHeader.HeapStatus); /* Initialize Subordinate Bus Number and Secondary Bus Number * In platform BIOS this address is allocated by PCI enumeration code @@ -258,7 +270,10 @@ AGESA_STATUS agesawrapper_amdinitmid(void) MidParam->FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3); MidParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3); + timestamp_add_now(TS_AGESA_INIT_MID_START); status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); + timestamp_add_now(TS_AGESA_INIT_MID_DONE); + if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); @@ -285,7 +300,11 @@ AGESA_STATUS agesawrapper_amdinitlate(void) /* NOTE: if not call amdcreatestruct, the initializer(AmdInitLateInitializer) would not be called */ AmdCreateStruct(&AmdParamStruct); AmdLateParams = (AMD_LATE_PARAMS *)AmdParamStruct.NewStructPtr; + + timestamp_add_now(TS_AGESA_INIT_LATE_START); Status = AmdInitLate(AmdLateParams); + timestamp_add_now(TS_AGESA_INIT_LATE_DONE); + if (Status != AGESA_SUCCESS) { agesawrapper_amdreadeventlog(AmdLateParams->StdHeader.HeapStatus); ASSERT(Status == AGESA_SUCCESS); |