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authorMartin Roth <martinroth@google.com>2016-01-31 10:39:47 -0700
committerMartin Roth <martinroth@google.com>2016-02-02 01:44:56 +0100
commitb00ddecd993c4d327628a7327015cb90d80d1dbb (patch)
tree4f8f7061678e7b9e5219238d657c4d33a8ca5365 /src
parent1010868f87db1e449a13833be4991cef9cf8b0fc (diff)
Kconfig: indent with tabs, not spaces.
Change-Id: I8996f8ab739a07014a4189738b5624485d752d9d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13540 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/oak/Kconfig2
-rw-r--r--src/soc/intel/skylake/Kconfig8
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig
index d63bdeff28..33f10be01a 100644
--- a/src/mainboard/google/oak/Kconfig
+++ b/src/mainboard/google/oak/Kconfig
@@ -48,7 +48,7 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
default 0
config DRIVER_TPM_I2C_BUS
- hex
+ hex
default 0x2
config DRIVER_TPM_I2C_ADDR
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 35b2a18ee6..0ebdaa4261 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -181,9 +181,9 @@ config DCACHE_RAM_SIZE_TOTAL
default 0x40000
config SKIP_FSP_CAR
- bool "Skip cache as RAM setup in FSP"
- default y
- help
- Skip Cache as RAM setup in FSP.
+ bool "Skip cache as RAM setup in FSP"
+ default y
+ help
+ Skip Cache as RAM setup in FSP.
endif