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authorArthur Heymans <arthur@aheymans.xyz>2018-12-28 15:48:58 +0100
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 14:05:20 +0000
commitadc4753a8d8c5dc7462547ab148c2d63eabbe4fa (patch)
treec93ad6be8d24feaa5a04c03a1d434897189be357 /src
parent085a2268083cfe1d22f696c9070726dcf2dc160f (diff)
usbdebug: Make the EHCI debug console work in the bootblock
Currently this needlessly initializes the hardware in the both the romstage and the bootblock, but it works. Build option is renamed to USBDEBUG_IN_PRE_RAM to reflect the use better, related support files can be built to pre-ram stages regardless of usbdebug being enabled or not. Tested on Google/peppy (adapted to C_ENVIRONMENT_BOOTBLOCK). Change-Id: Ib77f2fc7f3d8fa524405601bae15cce9f76ffc6f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/usb/Kconfig2
-rw-r--r--src/drivers/usb/Makefile.inc5
-rw-r--r--src/drivers/usb/ehci_debug.c7
-rw-r--r--src/include/console/usb.h7
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c2
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc3
-rw-r--r--src/soc/intel/broadwell/Makefile.inc3
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c2
-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/romstage.c2
-rw-r--r--src/southbridge/amd/agesa/hudson/Makefile.inc4
-rw-r--r--src/southbridge/amd/cimx/sb800/Makefile.inc3
-rw-r--r--src/southbridge/amd/pi/hudson/Makefile.inc4
-rw-r--r--src/southbridge/amd/sb700/Makefile.inc4
-rw-r--r--src/southbridge/amd/sb800/Makefile.inc4
-rw-r--r--src/southbridge/intel/common/Makefile.inc3
-rw-r--r--src/southbridge/intel/fsp_rangeley/Makefile.inc1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c2
-rw-r--r--src/southbridge/nvidia/ck804/Makefile.inc3
-rw-r--r--src/southbridge/nvidia/mcp55/Makefile.inc3
19 files changed, 41 insertions, 23 deletions
diff --git a/src/drivers/usb/Kconfig b/src/drivers/usb/Kconfig
index d48bf32936..6854c4a6b6 100644
--- a/src/drivers/usb/Kconfig
+++ b/src/drivers/usb/Kconfig
@@ -32,7 +32,7 @@ config USBDEBUG
if USBDEBUG
-config USBDEBUG_IN_ROMSTAGE
+config USBDEBUG_IN_PRE_RAM
bool "Enable early (pre-RAM) usbdebug"
default y
help
diff --git a/src/drivers/usb/Makefile.inc b/src/drivers/usb/Makefile.inc
index 6c46f045a5..c8d319bbdc 100644
--- a/src/drivers/usb/Makefile.inc
+++ b/src/drivers/usb/Makefile.inc
@@ -1,4 +1,5 @@
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c pci_ehci.c console.c gadget.c
-postcar-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c console.c
+bootblock-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
+romstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
+postcar-$(CONFIG_USBDEBUG) += ehci_debug.c console.c
ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c
index fdd2c72785..2020888189 100644
--- a/src/drivers/usb/ehci_debug.c
+++ b/src/drivers/usb/ehci_debug.c
@@ -683,7 +683,7 @@ static void migrate_ehci_debug(int is_recovery)
return;
}
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) {
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) {
/* Use state in CBMEM. */
dbg_info_cbmem = cbmem_find(CBMEM_ID_EHCI_DEBUG);
if (dbg_info_cbmem)
@@ -722,12 +722,13 @@ void usbdebug_init(void)
* CBMEM_INIT_HOOKs for postcar and ramstage as we recover state
* from CBMEM.
*/
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_ROMSTAGE)
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)
+ && (ENV_ROMSTAGE || ENV_BOOTBLOCK))
usbdebug_hw_init(false);
/* USB console init is done early in ramstage if it was
* not done in romstage, this does not require CBMEM.
*/
- if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_RAMSTAGE)
+ if (!IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM) && ENV_RAMSTAGE)
usbdebug_hw_init(false);
}
diff --git a/src/include/console/usb.h b/src/include/console/usb.h
index 45a501d536..d58a6a6e50 100644
--- a/src/include/console/usb.h
+++ b/src/include/console/usb.h
@@ -29,8 +29,9 @@ unsigned char usb_rx_byte(int idx);
int usb_can_rx_byte(int idx);
#define __CONSOLE_USB_ENABLE__ (IS_ENABLED(CONFIG_CONSOLE_USB) && \
- ((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
- (ENV_POSTCAR && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
+ ((ENV_BOOTBLOCK && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
+ (ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
+ (ENV_POSTCAR && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
ENV_RAMSTAGE))
#define USB_PIPE_FOR_CONSOLE 0
@@ -51,7 +52,7 @@ static inline void __usb_tx_flush(void) {}
/* */
#if 0 && IS_ENABLED(CONFIG_GDB_STUB) && \
- ((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) \
+ ((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) \
|| ENV_RAMSTAGE)
static inline void __gdb_hw_init(void) { usbdebug_init(); }
static inline void __gdb_tx_byte(u8 data)
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 44a1f3e714..af9b490554 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -239,7 +239,7 @@ void sdram_initialize(struct pei_data *pei_data)
}
/* mrc.bin reconfigures USB, so reinit it to have debug */
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
usbdebug_hw_init(true);
/* For reference print the System Agent version
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index a53984e4a3..0f6290bc49 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -42,6 +42,7 @@ bootblock-y += BiosCallOuts.c
bootblock-y += bootblock/bootblock.c
bootblock-y += gpio.c
bootblock-y += i2c.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
bootblock-y += monotonic_timer.c
bootblock-y += pmutil.c
bootblock-y += reset.c
@@ -55,7 +56,7 @@ bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
romstage-y += BiosCallOuts.c
romstage-y += i2c.c
romstage-y += romstage.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += gpio.c
romstage-y += monotonic_timer.c
romstage-y += pmutil.c
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index caf963c8e0..acb71fe7d7 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -61,7 +61,8 @@ ramstage-y += systemagent.c
ramstage-y += tsc_freq.c
romstage-y += tsc_freq.c
smm-y += tsc_freq.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
+romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-y += ehci.c
ramstage-y += xhci.c
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 15ab9ec949..19a0d44ecb 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -227,7 +227,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
__func__, (u32) status, (u32) hob_list_ptr);
/* FSP reconfigures USB, so reinit it to have debug */
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
usbdebug_hw_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 924aab2a25..003ae2270c 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -103,7 +103,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
__func__, (u32) status, (u32) hob_list_ptr);
/* FSP reconfigures USB, so reinit it to have debug */
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
usbdebug_hw_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index 2bf6f02539..5d3d5b4ad4 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -16,7 +16,9 @@ ramstage-y += sd.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc
index a5287fa231..418110b5e0 100644
--- a/src/southbridge/amd/cimx/sb800/Makefile.inc
+++ b/src/southbridge/amd/cimx/sb800/Makefile.inc
@@ -34,7 +34,8 @@ postcar-y += ramtop.c
romstage-y += ramtop.c
ramstage-y += ramtop.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
ramstage-y += smbus.c
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index 251cb6cbc5..c7cd757da2 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -28,8 +28,10 @@
#
#*****************************************************************************
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+
romstage-y += early_setup.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c
romstage-y += smbus.c
romstage-y += smbus_spd.c
diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc
index d93c9a6d5e..17d0a3abc0 100644
--- a/src/southbridge/amd/sb700/Makefile.inc
+++ b/src/southbridge/amd/sb700/Makefile.inc
@@ -13,7 +13,9 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
romstage-y += reset.c
ramstage-y += reset.c
ramstage-y += spi.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_setup.c
diff --git a/src/southbridge/amd/sb800/Makefile.inc b/src/southbridge/amd/sb800/Makefile.inc
index e5cdb56c8d..fd2577ce39 100644
--- a/src/southbridge/amd/sb800/Makefile.inc
+++ b/src/southbridge/amd/sb800/Makefile.inc
@@ -11,7 +11,9 @@ ramstage-y += pci.c
ramstage-y += pcie.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += ramtop.c
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 1a509b16a4..3224e1fcf1 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -29,7 +29,8 @@ ramstage-y += pmbase.c
postcar-y += pmbase.c
smm-y += pmbase.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
+romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc
index ace227c92e..ac5888ca38 100644
--- a/src/southbridge/intel/fsp_rangeley/Makefile.inc
+++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc
@@ -27,6 +27,7 @@ ramstage-y += acpi.c
romstage-y += early_usb.c early_smbus.c gpio.c early_spi.c early_init.c
romstage-y += romstage.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index bf92049479..0032fd6715 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -101,7 +101,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
__func__, (u32) status, (u32) hob_list_ptr);
/* FSP reconfigures USB, so reinit it to have debug */
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
usbdebug_hw_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);
diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc
index 554a4407f0..68495c5f1b 100644
--- a/src/southbridge/nvidia/ck804/Makefile.inc
+++ b/src/southbridge/nvidia/ck804/Makefile.inc
@@ -17,7 +17,8 @@ ramstage-y += reset.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc
index 7073b6974e..db0b3100ec 100644
--- a/src/southbridge/nvidia/mcp55/Makefile.inc
+++ b/src/southbridge/nvidia/mcp55/Makefile.inc
@@ -17,7 +17,8 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
romstage-y += early_ctrl.c