diff options
| author | Werner Zeh <werner.zeh@siemens.com> | 2015-11-06 08:22:22 +0100 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2015-11-11 06:42:01 +0100 |
| commit | 737c54d4d32dfe02b629ba7f4e86de4119c30d86 (patch) | |
| tree | 1c302c35496a98dfdc21479fc22f85418ed9ce20 /src | |
| parent | 74e03a4fdd597a027e41f826a8f1d9ec5b21c17f (diff) | |
fsp_baytrail: Add macros for legacy GPIO output set up
Up to now the GPIO set up macros for input sets up GPIOs to be
mapped to memory space while macros for outputs sets up GPIOs
to be mapped to legacy io space. This patch adds two additional
macros for legacy output definition and changes the old macros
to memory space mapping.
In addition, the intel/minnowmax mainboard is modified to use
the legacy macros for outputs to ensure this mainboard stays
unchanged in terms of functionality.
TEST=Booted siemens/mc_tcu3 and ensured GPIO set up in linux.
Change-Id: I99e98d31e1a59e63c58d536f2c493d6dcbfd1e75
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/12340
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/minnowmax/gpio.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/baytrail/gpio.h | 21 |
2 files changed, 22 insertions, 5 deletions
diff --git a/src/mainboard/intel/minnowmax/gpio.c b/src/mainboard/intel/minnowmax/gpio.c index 12d3aeb672..008dbee636 100644 --- a/src/mainboard/intel/minnowmax/gpio.c +++ b/src/mainboard/intel/minnowmax/gpio.c @@ -178,9 +178,9 @@ static const struct soc_gpio_map gpssus_gpio_map[] = { GPIO_INPUT, /* GPIO_S5[05] - BOM_OP1 - Memory: 0=1GB 1=2GB or 4GB*/ GPIO_INPUT, /* GPIO_S5[06] - BOM_OP2 */ GPIO_INPUT, /* GPIO_S5[07] - BOM_OP3 */ - GPIO_OUT_HIGH, /* GPIO_S5[08] - SOC_USB_HOST_EN0 */ - GPIO_OUT_HIGH, /* GPIO_S5[09] - SOC_USB_HOST_EN1 */ - GPIO_OUT_HIGH, /* GPIO_S5[10] - GPIO_S5_10_UNLOCK */ + GPIO_OUT_HIGH_LEGACY, /* GPIO_S5[08] - SOC_USB_HOST_EN0 */ + GPIO_OUT_HIGH_LEGACY, /* GPIO_S5[09] - SOC_USB_HOST_EN1 */ + GPIO_OUT_HIGH_LEGACY, /* GPIO_S5[10] - GPIO_S5_10_UNLOCK */ GPIO_FUNC0, /* GPIO_S5[11] - SUSPWRDNACK (TP14) */ GPIO_FUNC0, /* GPIO_S5[12] - PMC_SUSCLK0 */ GPIO_FUNC1, /* GPIO_S5[13] - PMC_SLP_S0IX (TP10) */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/gpio.h b/src/soc/intel/fsp_baytrail/baytrail/gpio.h index 3d30a86f0e..736f3ce01f 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/gpio.h +++ b/src/soc/intel/fsp_baytrail/baytrail/gpio.h @@ -202,12 +202,29 @@ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ .pad_val = PAD_VAL_INPUT, } +#define GPIO_OUT_LOW_LEGACY \ + { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \ + .pad_conf1 = PAD_CONFIG1_DEFAULT, \ + .pad_val = PAD_VAL_OUTPUT | PAD_VAL_LOW, \ + .use_sel = GPIO_USE_LEGACY, \ + .io_sel = GPIO_DIR_OUTPUT, \ + .gp_lvl = GPIO_LEVEL_LOW, \ + .is_gpio = 1 } + +#define GPIO_OUT_HIGH_LEGACY \ + { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \ + .pad_conf1 = PAD_CONFIG1_DEFAULT, \ + .pad_val = PAD_VAL_OUTPUT | PAD_VAL_HIGH, \ + .use_sel = GPIO_USE_LEGACY, \ + .io_sel = GPIO_DIR_OUTPUT, \ + .gp_lvl = GPIO_LEVEL_HIGH, \ + .is_gpio = 1 } #define GPIO_OUT_LOW \ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ .pad_val = PAD_VAL_OUTPUT | PAD_VAL_LOW, \ - .use_sel = GPIO_USE_LEGACY, \ + .use_sel = GPIO_USE_MMIO, \ .io_sel = GPIO_DIR_OUTPUT, \ .gp_lvl = GPIO_LEVEL_LOW, \ .is_gpio = 1 } @@ -216,7 +233,7 @@ { .pad_conf0 = PAD_PULL_DISABLE | PAD_CONFIG0_DEFAULT, \ .pad_conf1 = PAD_CONFIG1_DEFAULT, \ .pad_val = PAD_VAL_OUTPUT | PAD_VAL_HIGH, \ - .use_sel = GPIO_USE_LEGACY, \ + .use_sel = GPIO_USE_MMIO, \ .io_sel = GPIO_DIR_OUTPUT, \ .gp_lvl = GPIO_LEVEL_HIGH, \ .is_gpio = 1 } |