diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-02 23:28:03 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-04 08:43:39 +0000 |
| commit | 64120762f80bfebc8b04631a7dbea2e4cdec37df (patch) | |
| tree | c96f718a14c3a03f62497a6a02cdf26c9c5a4b74 /src | |
| parent | 3d93f045b27b629916d2cf743c7cce281a64ba40 (diff) | |
coreboot_table: Move VBOOT_VBNV support
The guard changes from (CHROMEOS && PC80_SYSTEM) to
VBOOT_VBNV_CMOS here.
Change-Id: I653285c04e864aa6a3494ba1400787fa184ba187
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/boot/coreboot_tables.h | 3 | ||||
| -rw-r--r-- | src/lib/coreboot_table.c | 16 | ||||
| -rw-r--r-- | src/security/vboot/vbnv_cmos.c | 12 |
3 files changed, 17 insertions, 14 deletions
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 7fd9ac169b..e77c60aad3 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -41,4 +41,7 @@ void lb_table_add_serialno_from_vpd(struct lb_header *header); struct lb_record *lb_new_record(struct lb_header *header); +/* Add VBOOT VBNV offsets. */ +void lb_table_add_vbnv_cmos(struct lb_header *header); + #endif /* COREBOOT_TABLES_H */ diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 00d73a009b..5f8c69bf2a 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -20,7 +20,6 @@ #include <bootmem.h> #include <bootsplash.h> #include <spi_flash.h> -#include <security/vboot/vbnv_layout.h> #include <smmstore.h> #if CONFIG(USE_OPTION_TABLE) @@ -189,17 +188,6 @@ static void lb_gpios(struct lb_header *header) } } -static void lb_vbnv(struct lb_header *header) -{ - struct lb_range *vbnv; - - vbnv = (struct lb_range *)lb_new_record(header); - vbnv->tag = LB_TAG_VBNV; - vbnv->size = sizeof(*vbnv); - vbnv->range_start = CONFIG_VBOOT_VBNV_OFFSET + 14; - vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE; -} - __weak uint32_t board_id(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t ram_code(void) { return UNDEFINED_STRAPPING_ID; } __weak uint32_t sku_id(void) { return UNDEFINED_STRAPPING_ID; } @@ -487,8 +475,8 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) lb_gpios(head); /* pass along VBNV offsets in CMOS */ - if (CONFIG(CHROMEOS) && CONFIG(PC80_SYSTEM)) - lb_vbnv(head); + if (CONFIG(VBOOT_VBNV_CMOS)) + lb_table_add_vbnv_cmos(head); /* Pass mmc early init status */ lb_mmc_info(head); diff --git a/src/security/vboot/vbnv_cmos.c b/src/security/vboot/vbnv_cmos.c index a719bb1774..35e4c410da 100644 --- a/src/security/vboot/vbnv_cmos.c +++ b/src/security/vboot/vbnv_cmos.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootstate.h> +#include <boot/coreboot_tables.h> #include <console/console.h> #include <types.h> #include <pc80/mc146818rtc.h> @@ -86,6 +87,17 @@ void vbnv_init_cmos(uint8_t *vbnv_copy) } } +void lb_table_add_vbnv_cmos(struct lb_header *header) +{ + struct lb_range *vbnv; + + vbnv = (struct lb_range *)lb_new_record(header); + vbnv->tag = LB_TAG_VBNV; + vbnv->size = sizeof(*vbnv); + vbnv->range_start = CONFIG_VBOOT_VBNV_OFFSET + 14; + vbnv->range_size = VBOOT_VBNV_BLOCK_SIZE; +} + #if CONFIG(VBOOT_VBNV_CMOS_BACKUP_TO_FLASH) static void back_up_vbnv_cmos(void *unused) { |