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authorShaunak Saha <shaunak.saha@intel.com>2017-11-07 14:37:02 -0800
committerAaron Durbin <adurbin@chromium.org>2017-12-13 19:25:40 +0000
commit562b168a77764d6bbf2624c9b63b1003f85c021b (patch)
tree682eb03ce2eb2021718e27cee109229aa38802d0 /src
parent02b43aa2e01772556a6b18a40677bb2438ba8327 (diff)
mb/cannonlake_rvp: Enable Touchpad
This patch enables the APLS touchpad in cnl-y platform. TEST= Boot and test touchpad works. Change-Id: I461b9d119b1cac6c8c6cb9b096697f58e00d80ad Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Reviewed-on: https://review.coreboot.org/22369 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/cannonlake_rvp/Kconfig2
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb10
2 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig
index 185825802a..b69a5e9466 100644
--- a/src/mainboard/intel/cannonlake_rvp/Kconfig
+++ b/src/mainboard/intel/cannonlake_rvp/Kconfig
@@ -8,6 +8,8 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select GENERIC_SPD_BIN
+ select DRIVERS_I2C_HID
+ select DRIVERS_I2C_GENERIC
config MAINBOARD_DIR
string
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
index ca46d36f32..d55259d9a4 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
@@ -83,7 +83,15 @@ chip soc/intel/cannonlake
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.3 on end # CNVi wifi
device pci 14.5 on end # SDCard
- device pci 15.0 on end # I2C #0
+ device pci 15.0 on
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ALPS0001""
+ register "generic.desc" = ""Touchpad""
+ register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+ register "hid_desc_reg_offset" = "0x1"
+ device i2c 2C on end
+ end
+ end # I2C 0
device pci 15.1 on end # I2C #1
device pci 15.2 off end # I2C #2
device pci 15.3 off end # I2C #3