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authorNico Huber <nico.h@gmx.de>2017-04-17 00:53:10 +0200
committerMartin Roth <martinroth@google.com>2017-04-19 16:25:45 +0200
commit54235ca1b765605be36a65cefabc958cde1c206a (patch)
tree583d3457482ff9230fae864fd2dc4e863cd7a8e6 /src
parent0624f9211892d1bd81f2967e8a715a031ad50b11 (diff)
console: Add convenient debug level macros for raminit
Change-Id: Ib92550fe755293ce8c65edf59242a2b04327128e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/19332 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/console/console.h3
-rw-r--r--src/northbridge/intel/gm45/gm45.h2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 3100ae2d55..d89d7471ca 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -22,6 +22,9 @@
#include <console/post_codes.h>
#include <commonlib/loglevel.h>
+#define RAM_DEBUG (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER)
+#define RAM_SPEW (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_SPEW : BIOS_NEVER)
+
#ifndef __ROMCC__
void post_code(u8 value);
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 60e9574459..258809fe8a 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -443,7 +443,5 @@ struct acpi_rsdp;
unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp);
#endif
-#define RAM_DEBUG (IS_ENABLED(CONFIG_DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER)
-
#endif /* !__ACPI__ */
#endif /* __NORTHBRIDGE_INTEL_GM45_GM45_H__ */