diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2018-03-02 14:56:38 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-06 08:48:51 +0000 |
| commit | 50f06a14cdcdd072720e684096e31b14f9fa2321 (patch) | |
| tree | b6d207da96c6b46f88662e3694377a92abe99fae /src | |
| parent | fd50b7c3d75bd3889cfa1f16e7b93c7ed1a3451c (diff) | |
soc/intel/skylake: Remove MCFG constants
The MMCONF base address and length are set in Kconfig so it does
not need to be redefined by the SOC as the code can just use the
Kconfig variable directly.
Tested on a fizz board to ensure MCFG is still created properly.
Change-Id: I5fd472b1afc8264823a2b9db0f296fbfb6b1ecc0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/24975
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/iomap.h | 3 |
2 files changed, 1 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 202d686d72..2e0d87a0f5 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -210,7 +210,7 @@ static void acpi_create_gnvs(global_nvs_t *gnvs) unsigned long acpi_fill_mcfg(unsigned long current) { current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, - MCFG_BASE_ADDRESS, 0, 0, + CONFIG_MMCONF_BASE_ADDRESS, 0, 0, (CONFIG_SA_PCIEX_LENGTH >> 20) - 1); return current; } diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h index 0a573acb38..ac0c78b3c0 100644 --- a/src/soc/intel/skylake/include/soc/iomap.h +++ b/src/soc/intel/skylake/include/soc/iomap.h @@ -22,9 +22,6 @@ /* * Memory-mapped I/O registers. */ -#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS -#define MCFG_BASE_SIZE 0x4000000 - #define PCH_PRESERVED_BASE_ADDRESS 0xfc800000 #define PCH_PRESERVED_BASE_SIZE 0x02000000 |