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authorFurquan Shaikh <furquan@google.com>2020-11-20 22:51:17 -0800
committerFurquan Shaikh <furquan@google.com>2020-12-08 18:58:06 +0000
commit0dcc0662f3c683248f3096f27de269fa0f88d357 (patch)
tree82a237d75e267173d0579f03a053c3adf478fb4d /src
parent19ba95f799e6a27223b9bde3d4d66a685794e3ed (diff)
util/cbfstool: Introduce concept of mmap_window
This change adds the concept of mmap_window to describe how the SPI flash address space is mapped to host address space on x86 platforms. It gets rid of the assumption that the SPI flash address space is mapped only below the 4G boundary in host space. This is required in follow up changes to be able to add more decode windows for the SPI flash into the host address space. Currently, a single mmap window is added i.e. the default x86 decode window of maximum 16MiB size living just below the 4G boundary. If the window is smaller than 16MiB, then it is mapped at the top of the host window. BUG=b:171534504 TEST=Verified using abuild with timeless option for all coreboot boards that there is no change in the resultant coreboot.rom file. Change-Id: I8dd3d1c922cc834c1e67f279ffce8fa438d8209c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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